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CEA3207A 参数 Datasheet PDF下载

CEA3207A图片预览
型号: CEA3207A
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ARM7的车载娱乐系统控制器 [ARM7-Based Car Entertainment Controller]
分类和应用: 控制器
文件页数/大小: 2 页 / 387 K
品牌: MICRONAS [ MICRONAS ]
 浏览型号CEA3207A的Datasheet PDF文件第2页  
PRODUCT INFORMATION
CEA 3207A
May/2005
CEA 3207A
ARM7-Based Car Entertainment Controller
The CEA 3207A is a device of Micronas’
32-bit Car Entertainment Controller family
based on an ARM7TDMI CPU core.
Like the already available CDC 3207G, the
CEA 3207A is part of the LEAP family con-
cept (Low Emission Automotive Processor).
The microcontroller with its ARM7TDMI
RISC CPU core allows two states of opera-
tion: ARM state with 32-bit instructions and
THUMB state with 16-bit instructions.
It is suited for entertainment-related appli-
cations like car radio or navigation systems.
The current version CEA 3207A offers
32 kBytes of SRAM, 512 kBytes of Flash,
and 8 kBytes of boot ROM. Communication
is possible via two FullCAN modules, two
I
2
C modules and two UART or SPI modules
each. Due to its scalable architecture, fur-
ther derivatives can be obtained within short
lead time. An upgrade version with 1 MByte
Flash and up to 64 kBytes RAM, as well as
a downgrade version with 256 kBytes Flash
and 16 kBytes RAM in the same package is
planned. All devices have the patented
built-in ERM (EMI Reduction Module) and
are operated on a single 5-V power supply.
Features
512 kBytes Flash ROM
32 kBytes SRAM
8 kBytes boot ROM
Four CPU operation modes
(Deep Slow, Slow, Fast, PLL)
PLL circuitry delivering up to 50 MHz
4- to 5-MHz oscillator
EMI reduction module (ERM)
Digital watchdog
Central clock divider
Interrupt controller with 40 inputs and
16 priority levels
Six port interrupts
Regulator input supervision for reset/
alarm
Clock and supply supervision
16-channel 10-bit ADC
Two comparators
ADC reference (1 internal, 3 external)
48
×
4 LCD module (optional)
Three DMA channels
Two UARTs, two SPIs
Two CAN modules with 512 Bytes each
of object RAM according to Bosch speci-
fication V2.0B (32 message objects)
Two I
2
C master modules
Six PWM modules (configurable as
2
×8
bit or 1×16 bit)
Pulse frequency modulator
Sound generator with auto decay
Two SW-selectable clock outputs
16-bit free-running counter with six cap-
ture/compare modules
1
×16
bit timer and 4x8 bit timer
JTAG interface
−40
to +105 °C case temperature range
Single 3.5 V to 5.5 V supply voltage
(limited I/O performance below 4.5 V)
Up to 102 GPIOs
128-pin PQFP package with 0.5 mm pin
pitch