MSP 44x8G
Contents
Page
6
6
7
8
9
9
9
9
10
10
12
12
12
12
12
13
13
13
13
13
13
13
13
14
14
14
14
15
15
16
16
17
17
17
17
17
17
17
17
20
21
21
Section
1.1.
1.2.
1.3.
2.1.
2.2.
2.2.1.
2.2.2.
2.2.3.
2.2.4.
2.2.5.
2.3.
2.4.
2.4.1.
2.5.
2.5.1.
2.5.2.
2.5.3.
2.6.
2.6.1.
2.6.2.
2.7.
2.7.1.
2.7.2.
2.8.
2.9.
2.10.
2.11.
3.1.
3.1.1.
3.1.2.
3.1.3.
3.1.4.
3.1.4.1.
3.1.4.2.
3.1.4.3.
3.1.4.4.
3.2.
3.3.
3.3.1.
3.3.2.
3.3.2.1.
3.3.2.2.
Title
Features of the MSP 44x8G Family
MSP 44x8G Version List
MSP 44x8G Versions and their Application Fields
Architecture of the MSP 44x8G Family
MSP 44x8G Sound IF Processing
Analog Sound IF Input
Demodulator: Standards and Features
Preprocessing of Demodulator Signals
Automatic Sound Select
Manual Mode
Preprocessing for SCART and I
2
S Input Signals
Source Selection and Output Channel Matrix
Mixing Unit
Audio Baseband Processing
Automatic Volume Correction (AVC)
Main and Aux Outputs
Quasi-Peak Detector
SCART Signal Routing
SCART DSP In and SCART Out Select
Stand-by Mode
I
2
S Bus Interfaces
Synchronous I
2
S-Interface(s)
Asynchronous I
2
S-Interface
ADR Bus Interface
Digital Control I/O Pins and Status Change Indication
Preemphasis
Clock PLL Oscillator and Crystal Specifications
I
2
C Bus Interface
Device and Subaddresses
Description of CONTROL Register
Protocol Description
Proposals for General MSP 44x8G I
2
C Telegrams
Symbols
Write Telegrams
Read Telegrams
Examples
Start-Up Sequence: Power-Up and I
2
C Controlling
MSP 44x8G Programming Interface
User Registers Overview
Description of User Registers
STANDARD SELECT Register
STANDARD RESULT Register
PRELIMINARY DATA SHEET
2
Micronas