4.6.3. Recommended Crystal Characteristics
Symbol
T
A
f
P
∆f
P
/f
P
∆f
P
/f
P
R
R
C
0
C
1
Parameter
Operating Ambient Temperature
Parallel Resonance Frequency
with Load Capacitance
C
L
= 13 pF
Accuracy of Adjustment
Frequency Temperature Drift
Series Resistance
Shunt Capacitance
Motional Capacitance
Min.
0
–
–
–
–
3
20
Typ.
–
20.250000
–
–
–
–
–
ADVANCE INFORMATION
Max.
65
–
±20
±30
25
7
30
Unit
°C
MHz
ppm
ppm
Ω
pF
fF
Load Capacitance Recommendation
C
Lext
External Load Capacitance
1)
from
pins to Ground
(pin names: Xtal1 Xtal2)
–
3.3
–
pF
DCO Characteristics
2,3)
C
ICLoadmin
Effective Load Capacitance @ min.
DCO–Position, Code 0,
package: 68PLCC
Effective Load Capacitance Range,
DCO Codes from 0..255
3
4.3
5.5
pF
C
ICLoadrng
1)
11
12.7
15
pF
Remarks on defining the External Load Capacitance:
External capacitors at each crystal pin to ground are required. They are necessary to tune the effective load capacitance of the
PCBs to the required load capacitance C
L
of the crystal. The higher the capacitors, the lower the clock frequency results. The
nominal free running frequency should match f
p
MHz. Due to different layouts of customer PCBs the matching capacitor size
should be determined in the application. The suggested value is a figure based on experience with various PCB layouts.
Tuning condition: Code DVCO Register=–720
2)
Remarks on Pulling Range of DCO:
The pulling range of the DCO is a function of the used crystal and effective load capacitance of the IC (C
ICLoad
+C
LoadBoard
).
The resulting frequency f
L
with an effective load capacitance of C
Leff
= C
ICLoad
+ C
LoadBoard
is:
1 + 0.5 * [ C
1
/ (C
0
+ C
L
) ]
f
L
= f
P
* _______________________
1 + 0.5 * [ C
1
/ (C
0
+ C
Leff
) ]
3)
Remarks on DCO codes
The DCO hardware register has 8 bits, the fp control register uses a range of –2048...2047
60
Micronas
MICRONAS [ MICRONAS ]
