Revision 8
ACT 2 Family FPGAs
Features
• Up to 8,000 Gate Array Gates
(20,000 PLD equivalent gates)
• Replaces up to 200 TTL Packages
• Replaces up to eighty 20-Pin PAL
®
Packages
• Design Library with over 500 Macro Functions
• Single-Module Sequence Functions
• Wide-Input Combinatorial Functions
• Up to 1,232 Programmable Logic Modules
• Up to 998 Flip-Flops
Table 1 • ACT 2 Product Family Profile
Device
Capacity
Gate Array Equivalent Gates
PLD Equivalent Gates
TTL Equivalent Package
20-Pin PAL Equivalent Packages
Logic Modules
S-Module
C-Module
Flip-Flops (maximum)
Routing Resources
Horizontal Tracks/Channel
Vertical Tracks/Channel
PLICE Antifuse Elements
User I/Os (maximum)
Performance
1
16-Bit Prescaled Counters
16-Bit Loadable Counters
16-Bit Accumulators
Packages
2
CPGA
PLCC
PQFP
VQFP
TQFP
CQFP
PG100
PL84
PQ100
VQ100
–
–
PG132
PL84
PQ144
–
TQ176
–
PG176
PL84
PQ160
–
TQ176
CQ172
105 MHz
70 MHz
39 MHz
100 MHz
69 MHz
38 MHz
85 MHz
67 MHz
36 MHz
36
15
250,000
83
36
15
400,000
104
36
15
750,000
140
2,500
6,250
63
25
451
231
220
382
4,000
10,000
100
40
684
348
336
568
8,000
20,000
200
80
1,232
624
608
998
A1225A
A1240A
A1280A
• Datapath Performance at 105 MHz
• 16-Bit Accumulator Performance to 39 MHz
• Two In-Circuit Diagnostic Probe Pins Support Speed
Analysis to 50 MHz
• Two High-Speed, Low-Skew Clock Networks
• I/O Drive to 10 mA
• Nonvolatile, User Programmable
• Logic Fully Tested Prior to Shipment
• 1.0 micron CMOS Technology
Notes:
1. Performance is based on –2 speed devices at commercial worst-case operating conditions using PREP Benchmarks, Suite #1,
Version 1.2, dated 3-28-93. Any analysis is not endorsed by PREP.
2. See the
for package availability.
January 2012
© 2012 Microsemi Corporation
I
MICROSEMI [ MICROSEMI CORPORATION ]
