J110
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix J110
This n-channel JFET is optimised for low noise high
performance switching. The part is particularly suitable
for use in low noise audio amplifiers. The SOT-23
package is well suited for cost sensitive applications
and mass production.
(See Packaging Information).
FEATURES
DIRECT REPLACEMENT FOR SILICONIX J110
LOW ON RESISTANCE
r
DS(on)
≤ 18Ω
FAST SWITCHING
t
(on)
≤ 4ns
ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
‐55°C to +150°C
J110 Benefits:
Operating Junction Temperature
‐55°C to +150°C
Low On Resistance
Maximum Power Dissipation
Low insertion loss
Continuous Power Dissipation
350mW
Low Noise
MAXIMUM CURRENT
J110 Applications:
Gate Current (Note 1)
50mA
Analog Switches
MAXIMUM VOLTAGES
Commutators
Gate to Drain Voltage
V
GDS
= ‐25V
Choppers
Gate to Source Voltage
V
GSS
= ‐25V
J110 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
CHARACTERISTIC
MIN
TYP.
MAX
UNITS
CONDITIONS
BV
GSS
Gate to Source Breakdown Voltage
‐25
‐‐
‐‐
I
G
= 1µA, V
DS
= 0V
V
GS(off)
Gate to Source Cutoff Voltage
‐0.5
‐‐
‐4
V
DS
= 5V, I
D
= 1µA
V
V
GS(F)
Gate to Source Forward Voltage
‐‐
0.7
‐‐
I
G
= 1mA, V
DS
= 0V
I
DSS
Drain to Source Saturation Current (Note 2)
10
‐‐
‐‐
mA
V
DS
= 15V, V
GS
= 0V
I
GSS
Gate Reverse Current
‐‐
‐0.01
‐3
V
GS
= ‐15V, V
DS
= 0V
I
G
I
D(off)
r
DS(on)
J110 DYNAMIC ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
g
fs
g
os
Output Conductance
‐‐
0.6
‐‐
r
DS(on)
Drain to Source On Resistance
‐‐
‐‐
18
Ω
V
GS
= 0V, I
D
= 0A, f = 1kHz
C
iss
Input Capacitance
‐‐
60
‐‐
V
DS
= 0V, V
GS
= 0V, f = 1MHz
pF
C
rss
Reverse Transfer Capacitance
‐‐
11
‐‐
V
DS
= 0V, V
GS
= ‐10V, f = 1MHz
e
n
Equivalent Noise Voltage
‐‐
3.5
‐‐
nV/√Hz
V
DS
= 5V, I
D
= 10mA , f = 1kHz
J110 SWITCHING CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
CHARACTERISTIC
UNITS
CONDITIONS
Turn On Time
Turn On Rise Time
Turn Off Time
Turn Off Fall Time
3
1
4
18
ns
V
DD
= 1.5V
V
GS
(H) = 0V
See Switching Circuit
Available Packages:
J110 in SOT-23
J110 in bare die.
Please contact Micross for full
package and die dimensions
SOT-23 (Top View)
t
d(on)
t
r
t
d(off)
t
f
Note 1 ‐ Absolute maximum ratings are limiting values above which J110 serviceability may be impaired. Note 2 – Pulse test: PW≤ 300 µs, Duty Cycle ≤ 3%
J110 SWITCHING CIRCUIT PARAMETERS
‐5V
R
L
150Ω
I
D(on)
10mA
Micross Components Europe
V
GS(L)
SWITCHING TEST CIRCUIT
Tel: +44 1603 788967
Email:
chipcomponents@micross.com
Web:
http://www.micross.com/distribution
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.