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LS301 参数 Datasheet PDF下载

LS301图片预览
型号: LS301
PDF下载: 下载PDF文件 查看货源
内容描述: 线性系统的高电压超级测试版单片双NPN [Linear Systems High Voltage Super-Beta Monolithic Dual NPN]
分类和应用: 测试
文件页数/大小: 1 页 / 271 K
品牌: MICROSS [ MICROSS COMPONENTS ]
   
LS301
MONOLITHIC DUAL
NPN TRANSISTOR
Linear Systems High Voltage Super-Beta Monolithic Dual NPN
The LS301 is a monolithic pair of high voltage Super-
Beta NPN transistors mounted in a single P-DIP
package. The monolithic dual chip design reduces
parasitics and gives better performance while ensuring
extremely tight matching.
The 8 Pin P-DIP provides ease of manufacturing, and
the symmetrical pinout prevents improper orientation.
(See Packaging Information).
LS301 Features:
Very high gain
Tight matching
Low Output Capacitance
FEATURES 
HIGH  GAIN
 
LOW OUTPUT CAPACITANCE 
TIGHT V
BE
 MATCHING 
HIGH f
t
 
ABSOLUTE MAXIMUM RATINGS 
1
 
@ 25°C (unless otherwise noted) 
Maximum Temperatures 
Storage Temperature 
Operating Junction Temperature 
Maximum Power Dissipation 
Continuous Power Dissipation (One side) 
Continuous Power Dissipation (Both sides) 
Linear Derating factor (One side) 
Linear Derating factor (Both sides) 
Maximum Currents 
Collector Current 
 
MIN 
‐‐ 
TYP 
0.2 
MAX 
UNITS 
mV 
h
FE
 ≥ 2000 @ 1µA TYP. 
C
OBO
 ≤ 2.0pF 
|V
BE1 
– V
BE2 
|= 0.2mV TYP. 
100MHz 
‐65°C to +200°C 
‐55°C to +150°C 
250mW 
500mW 
2.3mW/°C 
4.3mW/°C 
5mA 
 
CONDITIONS 
I
= 10µA, V
CE 
= 5V 
CE 
= 5V 
CE 
= 5V 
CE 
= 5V 
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated) 
SYMBOL 
CHARACTERISTIC 
|V
BE1 
– V
BE2 
Base Emitter Voltage Differential 
∆|(V
BE1 
– V
BE2
|I
B1 
– I
h
FE1 
 
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
BV
CBO
 
Collector to Base Voltage 
18 
BV
CEO
 
Collector to Emitter Voltage 
18 
BV
EBO
 
Emitter‐Base Breakdown Voltage 
6.2 
BV
CCO
 
Collector to Collector Voltage 
100 
 
‐‐ 
 
DC Current Gain 
h
FE
 
2000 
‐‐ 
V
CE
(SAT) 
Collector Saturation Voltage 
‐‐ 
I
EBO
 
Emitter Cutoff Current 
‐‐ 
I
CBO
 
Collector Cutoff Current 
‐‐ 
C
OBO
 
Output Capacitance 
‐‐ 
C
C1C2
 
Collector to Collector Capacitance 
‐‐ 
I
C1C2
 
Collector to Collector Leakage Current 
‐‐ 
f
T
 
Current Gain Bandwidth Product 
100 
NF 
Narrow Band Noise Figure 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
2000 
‐‐ 
2000 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
0.5 
0.2 
100 
0.5 
‐‐ 
 
 
 
pA 
pA 
pF 
pF 
nA 
MHz 
dB 
I
= 10µA, I
= 0 
I
= 10µA, I
= 0 
I
= 10µA, I
= 0
2
 
I
= 10µA, I
= 0 
I
= 1µA, V
CE 
= 5V 
I
= 10µA, V
CE 
= 5V 
I
= 500µA, V
CE 
= 5V 
I
= 1mA, I
= 0.1mA 
I
= 0, V
EB 
= 3V 
I
= 0, V
CB 
= 10V 
I
= 0, V
EB 
= 1V 
V
CC 
= 0V 
V
CC 
= ±80V 
I
= 200µA, V
CE 
= 5V 
I
= 10µA,  V
CE 
= 3V, BW=200Hz, R
G
= 10KΩ,  
f = 1KHz 
Notes: 
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired
2. The reverse base‐to‐emitter voltage must never exceed 6.2 volts; the reverse base‐to‐emitter current must never exceed 10µA. 
 
 
P-DIP (Top View)
 
 
Available Packages:
LS301 in P-DIP
LS301 available as bare die
Please contact Micross for full package and die dimensions:
Email:
chipcomponents@micross.com
Web:
www.micross.com/distribution.aspx
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.