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LS5912 参数 Datasheet PDF下载

LS5912图片预览
型号: LS5912
PDF下载: 下载PDF文件 查看货源
内容描述: N沟道JFET [N-CHANNEL JFET]
分类和应用: 晶体晶体管开关光电二极管
文件页数/大小: 1 页 / 275 K
品牌: MICROSS [ MICROSS COMPONENTS ]
   
LS5912
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix & National 2N5912
The LS5912 are monolithic dual JFETs. The monolithic
dual chip design reduces parasitics and gives better
performance at very high frequencies while ensuring
extremely tight matching. These devices are an
excellent choice for use as wideband differential
amplifiers in demanding test and measurement
applications. The LS5912 is a direct replacement for
discontinued Siliconix and National LS5912.
The hermetically sealed TO-71 is well suited for military
and harsh environment applications.
(See Packaging Information).
FEATURES 
Improved Direct Replacement for SILICONIX & NATIONAL 2N5912 
LOW NOISE (10KHz) 
e
n
~ 4nV/√Hz 
HIGH TRANSCONDUCTANCE (100MHz) 
g
fs 
≥ 4000µS 
1
ABSOLUTE MAXIMUM RATINGS 
 
@ 25°C (unless otherwise noted) 
Maximum Temperatures 
Storage Temperature 
Operating Junction Temperature 
Maximum Power Dissipation 
Continuous Power Dissipation (Total) 
Maximum Currents 
Gate Current 
Maximum Voltages 
Gate to Drain 
Gate to Source 
 
 
 
MIN 
‐‐ 
TYP 
‐‐ 
MAX 
15 
UNITS 
mV 
‐65°C to +150°C 
‐55°C to +135°C 
500mW 
50mA 
‐25V 
‐25V 
 
 
 
CONDITIONS 
V
DG 
= 10V, I
= 5mA           
LS5912 Applications:
Wideband Differential Amps
High-Speed,Temp-Compensated Single-
Ended Input Amps
High-Speed Comparators
Impedance Converters and vibrations
detectors
.
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated) 
SYMBOL 
CHARACTERISTIC 
|V
GS1 
– V
GS2 
Differential Gate to Source Cutoff Voltage 
∆|V
GS1 
– V
GS2 
I
DSS1  
|I
G1 
– I
g
fs1 
 
CMRR 
Common Mode Rejection Ratio 
‐‐ 
85 
‐‐ 
dB 
TYP. 
‐‐ 
‐‐ 
0.7 
‐‐ 
‐‐ 
‐1 
‐1 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
MAX. 
 
‐5 
‐‐ 
‐4 
40 
‐50 
‐50 
10000 
10000 
100 
150 
1.2 
20 
10 
UNITS 
 
 
mA 
 
pA 
 
µS 
 
pF 
 
dB 
nV/√Hz 
CONDITIONS 
I
= ‐1µA, V
DS
 = 0V 
V
DS 
= 10V, I
D
= 1nA 
I
=  1mA, V
DS
 = 0V 
V
DG 
= 10V, I
= 5mA 
V
DS 
= 10V, V
GS 
= 0V 
V
GS 
= ‐15V, V
DS 
= 0V 
V
DG 
= 10V, I
= 5mA 
 
V
DG 
= 10V, I
D
= 5mA 
Forward Transconductance 
Output Conductance 
Input Capacitance 
Reverse Transfer Capacitance 
Noise Figure 
Equivalent Input Noise Voltage 
4000 
4000 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
V
DG 
= 5V to 10V, I
= 5mA         
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTICS 
MIN. 
BV
GSS
 
Gate to Source Breakdown Voltage 
‐25 
V
GS(off)
 
Gate to Source Cutoff Voltage 
‐1 
V
GS(F)
 
Gate to Source Forward Voltage 
‐‐ 
V
GS
 
Gate to Source Voltage 
‐0.3 
3
I
DSS
 
Gate to Source Saturation Current
 
3
I
GSS
 
Gate Leakage Current
 
‐‐ 
I
G
 
Gate Operating Current 
‐‐ 
g
fs
 
g
os
 
C
ISS
 
C
RSS
 
NF 
e
n
 
V
DG 
= 10V, I
= 5mA, f = 1MHz 
V
DG 
= 10V, I
= 5mA, f = 10kHz, R
= 100KΩ 
V
DG 
= 10V, I
= 5mA, f = 100Hz 
V
DG 
= 10V, I
= 5mA, f = 10kHz 
Notes: 1. Absolute Maximum ratings are limiting values above which serviceability may be impaired
     2. Pulse Test: PW ≤ 300µs Duty Cycle ≤ 3%
3. Assumes smaller value in numerator 
 
Available Packages:
TO-71 (Top View)
 
Please contact Micross for full package and die dimensions:
Email:
chipcomponents@micross.com
Web:
www.micross.com/distribution.aspx
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
LS5912 in TO-71
LS5912 available as bare die