LSU421
HIGH INPUT IMPEDANCE
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix U421
The LSU421 is a high input impedance Monolithic Dual N-Channel JFET
The LSU421 monolithic dual n-channel JFET is
designed
to provide very high input impedance for differential
amplification and impedance matching. Among its
many unique features, this series offers operating gate
current specified at -250 fA. The LSU421 is a direct
replacement for discontinued Siliconix U421.
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications. The 8 Pin P-DIP
and 8 Pin SOIC provide ease of manufacturing, and the
symmetrical pinout prevents improper orientation.
(See Packaging Information).
FEATURES
HIGH INPUT IMPEDANCE
HIGH GAIN
LOW POWER OPERATION
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise noted)
I
G
= 0.25pA MAX
gfs = 120µmho MIN
V
GS(OFF)
= 2V MAX
LSU421 Applications:
Ultra Low Input Current Differential Amps
High-Speed Comparators
Impedance Converters
Maximum Temperatures
Storage Temperature
‐65°C to +150°C
Operating Junction Temperature
+150°C
Maximum Voltage and Current for Each Transistor – Note 1
‐V
GSS
Gate Voltage to Drain or Source
40V
‐V
DSO
Drain to Source Voltage
40V
‐I
G(f)
Gate Forward Current
10mA
Maximum Power Dissipation
Device Dissipation @ Free Air – Total 400mW @ +125°C
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
SYMBOL
CHARACTERISTICS VALUE UNITS CONDITIONS
|∆V
GS1‐2
/∆T|max.
DRIFT VS.
10
µV/°C V
DG
=10V, I
D
=30µA
TEMPERATURE
T
A
=‐55°C to +125°C
| V
GS1‐2
| max.
OFFSET VOLTAGE
10
mV
V
DG
=10V, I
D
=30µA
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
0.1
90
90
‐‐
20
10
‐‐
‐‐
2.0
1.8
.25
250
1.0
1.0
10
3.0
‐‐
‐‐
1
70
‐‐
3.0
1.5
V
V
pA
pA
pA
nA
µmho
µmho
dB
dB
dB
nV/√Hz
pF
pF
S
= 0
= 0V
V
DS
= 10V I
D
= 1nA
V
DG
= 10V I
D
= 30µA
V
DG
= 10V I
D
= 30µA
T
A
= +125°C
V
DS
= 0V V
GS
= 20V
T
A
= +125°C
V
DS
= 10V V
GS
= 0V
V
DG
= 10V I
D
= 30µA
∆V
DS
= 10 to 20V I
D
= 30µA
∆V
DS
= 5 to 10V I
D
= 30µA
V
DG
= 10V I
D
= 30µA R
G
= 10MΩ
f = 10Hz
V
DG
= 10V I
D
= 30µA f = 10Hz
V
DG
= 10V I
D
= 30µA f = 1KHz
V
DS
= 10V V
GS
= 0 f = 1MHz
P-DIP / SOIC (Top View)
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
BV
GSS
BV
GGO
Y
fSS
Y
fS
I
DSS
GATE VOLTAGE
V
GS(off)
Pinchoff voltage
‐‐
V
GS
Operating Range
‐‐
GATE CURRENT
I
G
max.
Operating
‐‐
‐I
G
max.
High Temperature
‐‐
I
GSS
max.
At Full Conduction
‐‐
‐I
GSS
max.
High Temperature
‐‐
OUTPUT CONDUCTANCE
Y
OSS
Full Conduction
‐‐
Y
OS
Operating
‐‐
COMMON MODE REJECTION
CMR
‐20 log | ∆V
GS1‐2
/ ∆V
DS
|
‐‐
‐20 log | ∆V
GS1‐2
/ ∆V
DS
|
‐‐
NOISE
NF
Figure
‐‐
e
n
Voltage
‐‐
‐‐
CAPACITANCE
C
ISS
Input
‐‐
C
RSS
Reverse Transfer
‐‐
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
TO-71 / TO-78 (Top View)
Available Packages:
LSU421 in TO-71 & TO-78
LSU421 in PDIP & SOIC
LSU421 available as bare die
Please contact
Micross
for full package and die dimensions
Email:
chipcomponents@micross.com
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.