欢迎访问ic37.com |
会员登录 免费注册
发布采购

PN4391 参数 Datasheet PDF下载

PN4391图片预览
型号: PN4391
PDF下载: 下载PDF文件 查看货源
内容描述: 线性系统替换停产Siliconix的PN4391 [Linear Systems replaces discontinued Siliconix PN4391]
分类和应用: 晶体晶体管开关
文件页数/大小: 1 页 / 290 K
品牌: MICROSS [ MICROSS COMPONENTS ]
   
PN4391
Single N-Channel JFET switch
Linear Systems replaces discontinued Siliconix PN4391
FEATURES 
DIRECT REPLACEMENT FOR SILICONIX PN4391 
LOW ON RESISTANCE 
r
DS(on) 
≤ 30Ω 
LOW GATE OPERATING CURRENT 
I
D(off) 
= 5pA 
FAST SWITCHING 
t
(ON)
 ≤= 15ns 
PN4391 Benefits:
1
ABSOLUTE MAXIMUM RATINGS
 @ 25°C (unless otherwise noted) 
Low Error Voltage
Maximum Temperatures 
High-Speed Analog Circuit Performance
Storage Temperature 
‐65°C to +200°C 
Negligible “Off-Error,” Excellent Accuracy
Good Frequency Response, Low Glitches
Operating Junction Temperature 
‐55°C to +200°C 
Eliminates Additional Buffering
Maximum Power Dissipation 
Continuous Power Dissipation  
350mW 
PN4391 Applications:
MAXIMUM CURRENT
Analog Switches
Gate Current (Note 1) 
I
G
 = 50mA 
Choppers,
Sample-and-Hold
MAXIMUM VOLTAGES 
Normally “On” Switches, Current Limiters
Gate to Drain Voltage /  Gate to Source Voltage 
‐40V 
PN4391 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTIC 
MIN 
TYP. 
MAX 
UNITS 
CONDITIONS 
BV
GSS
 
Gate to Source Breakdown Voltage 
‐40 
‐‐ 
‐‐ 
 
I
= ‐1µA,   V
DS
 = 0V 
V
GS(off)
 
Gate to Source Cutoff Voltage 
‐4 
‐‐ 
‐10 
V
DS
 = 20V, I
D
 = 1nA 
V
GS(F)
 
Gate to Source Forward Voltage 
‐‐ 
0.7 
                   I
=  1mA,   V
DS
 = 0V 
V
DS(on)
 
Drain to Source On Voltage 
‐‐ 
0.25 
‐‐ 
V
GS 
= 0V,   I
D
 = 3mA 
V
DS(on)
 
Drain to Source On Voltage 
‐‐ 
0.3 
‐‐ 
 
V
GS 
= 0V,   I
D
 = 6mA 
V
DS(on)
 
Drain to Source On Voltage 
‐‐ 
0.35 
0.4 
 
V
GS 
= 0V,   I
D
 = 12mA 
2
I
DSS
 
Drain to Source Saturation Current
 
50 
‐‐ 
100 
mA 
V
DS
 = 20V, V
GS 
= 0V 
I
GSS
 
Gate Reverse Current 
‐‐ 
‐5 
‐1000 
 
V
GS 
= ‐20V,  V
DS
 = 0V 
I
G
 
 
I
D(off)
 
 
r
DS(on)
 
PN4391 DYNAMIC ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) 
SYMBOL 
The PN4391 features many of the superior
characteristics of JFETs which make it a good choice
for demanding analog switching applications and for
specialized amplifier circuits.
g
fs
 
g
os
 
r
ds(on)
 
C
iss
 
C
rss
 
C
rss
 
C
rss
 
e
n
 
SYMBOL 
t
d(on)
 
t
r
 
t
d(off)
 
t
f
 
Equivalent Input Noise Voltage 
CHARACTERISTIC 
 
Turn On Time 
 
Turn Off Time 
Forward Transconductance 
Output Conductance 
Input Capacitance 
 
Reverse Transfer Capacitance 
‐‐ 
‐‐ 
mS 
µS 
Ω 
 
 
pF 
25 
‐‐ 
12 
3.5 
3.4 
TYP 
13 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
MIN 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
‐‐ 
Drain to Source On Resistance 
‐‐ 
30 
16 
‐‐ 
‐‐ 
‐‐ 
MAX 
15 
20 
15 
nV/√Hz 
UNITS 
 
 
ns 
 
CONDITIONS 
V
DS
 = 20V,  I
D
 = 1mA,  f = 1kHz 
V
DS
 = 20V,  I
D
 = 1mA,  f = 1kHz 
V
GS
 = 0V,  I
D
 = 0A,  f = 1kHz 
V
DS
 = 20V,   V
GS
 = 0V,  f = 1MHz 
V
DS
 = 0V,   V
GS
 = ‐5V,  f = 1MHz 
V
DS
 = 0V,   V
GS
 = ‐7V,  f = 1MHz 
V
DS
 = 0V,   V
GS
 = ‐12V,  f = 1MHz 
V
DS
 = 10V,  I
D
 = 10mA,  f = 1kHz 
PN4391 SWITCHING ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) 
 
 
V
DD
 = 10V,   V
GS(H)
 = 0V 
Notes: 1. Absolute ratings are limiting values above which serviceability may be impaired 
             2. Pulse test: PW ≤ 300µs, Duty Cycle ≤ 3% 
PN4391 SWITCHING CIRCUIT PARAMETERS                                                                                                                                         SWITCHING CIRCUIT 
V
GS(L)
 
‐12V 
 
TO-92 (Bottom View)
R
L
 
800Ω 
 
I
D(on)
 
12mA 
 
 
 
 
Available Packages:
 
 
 
PN4391 in TO-92
 
 
 
PN4391 in bare die.
 
 
 
Contact Micross for full package and die dimensions
 
 
 
Micross Components Europe
Tel: +44 1603 788967
Email:
chipcomponents@micross.com
Web:
http://www.micross.com/distribution
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.