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MH89790BS 参数 Datasheet PDF下载

MH89790BS图片预览
型号: MH89790BS
PDF下载: 下载PDF文件 查看货源
内容描述: ST- BUS⑩家庭CEPT PCM 30 / CRC - 4成帧器和接口的初步信息 [ST-BUS⑩ FAMILY CEPT PCM 30/CRC-4 Framer & Interface Preliminary Information]
分类和应用: 电信集成电路光电二极管PC
文件页数/大小: 32 页 / 491 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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®
ST-BUS™ FAMILY
MH89790B
CEPT PCM 30/CRC-4 Framer & Interface
Preliminary Information
Features
Complete primary rate 2048 kbit/s CEPT
transceiver with CRC-4 option
Selectable HDB3 or AMI line code
Two frame elastic buffer with 32µs jitter buffer
Tx and Rx frame and multiframe
synchroniza-tion signals
Frame alignment and CRC error counters
Insertion and detection of A, B, C, D signalling
bits with optional debounce
Line driver and receiver
Per channel, overall, and remote loop around
Digital phase detector between E1 line and
ST-BUS
ST-BUS compatible
Pin compatible with the MH89790
Inductorless clock recovery
Loss of Signal (LOS) indication
Available in standard, narrow and surface
mount formats
Supports single supply rail operation
MH89790B
MH89790BN
MH89790BS
ISSUE 5
May 1995
Ordering Information
40 Pin DIL Hybrid 1.3” row pitch
40 Pin DIL Hybrid 0.8“ row pitch
40 Pin Surface Mount Hybrid
0°C to 70°C
Description
The MH89790B is Mitel’s CEPT PCM 30 interface
solution, designed to meet the latest CCITT
standards PCM 30 format with CRC-4.
The
MH89790B provides a complete interface between a
2.048 Mbit/sec digital trunk and Mitel’s
Serial
Telecom Bus, the ST-BUS.
The MH89790B is a pin-compatible enhancement of
the MH89790, permitting the removal of the tuneable
inductor and inclusion of the external NAND gate
used for generating RxD.
Applications
Primary rate ISDN network nodes
Multiplexing equipment
Private network: PBX to PBX links
TxMF
C2i
F0i
RxMF
DSTo
DSTi
CSTi0
CSTi1
CSTo
ST-BUS
Timing
Cicuitry
Digital
Attenu-
ator
ROM
2 Frame
Elastic
Buffer
with Slip
Control
PADi
TxG
PADo
CEPT
Link
Interface
Transmitter
OUTA
OUTB
RxA
RxT
Receiver
LOS
RxR
RxB
Data
Interface
Serial
Control
Interface
ABCD
Signalling RAM
Control
Logic
Phase
Detector
Clock
Extractor
CEPT
Counter
E2o
VDD
ADl
XCtl
XSt
E8Ko
VSS
Figure 1 - Functional Block Diagram
4-187