MT8804A
CMOS
24 PIN CERDIP/PLASTIC DIP
Figure 2 - Pin Connections
Pin Description
Pin #*
1-3
4
5
6
7
8
9
10
11
12
13
14-16
17
Name
L2-L0
D0
J0
DI
J1
D2
J2
D3
J3
V
SS
V
EE
A0-A2
AE
Description
L2-L0 Analog Lines (Inputs/Outputs):
these are connected to the L2-L0 columns of the
switch array.
D0 Data (Input):
Active High.
J0 Analog Junctor (Input/Output):
this is connected to the J0 row of the switch array.
DI Data (Input).
Active High.
J1 Analog Junctor (Input/Output):
this is connected to the J1 row of the switch array.
D2 Data (Input):
Active High.
J2 Analog Junctor (Input/Output):
this is connected to the J2 row of the switch array.
D3 Data (Input):
Active High.
J3 Analog Junctor (Input/Output):
this is connected to the J3 row of the switch array.
Digital Ground Reference.
Negative Power Supply.
A0-A2 Address Lines (Inputs).
Address Enable/Strobe (Input):
enables function selected by address and data. Address
must be stable before AE goes high and D0-D3 must be stable on the falling edge of the
AE. Active High.
Master RESET (Input):
this is used to turn off all switches. Active High.
L7-L3 Analog Lines (Inputs/Outputs):
these are connected to the L7-L3 columns of the
switch array.
Positive Power Supply.
18
19-23
24
MR
L7-L3
V
DD
* Plastic DIP and CERDIP only
3-4
D3
J3
VSS
VEE
A0
A1
NC
L2
L1
L0
D0
J0
D1
J1
D2
J2
D3
J3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
L3
L4
L5
L6
L7
MR
AE
A2
A1
A0
VEE
4
3
2
1
28
27
26
•
NC
L0
L1
L2
VDD
L3
L4
12
13
14
15
16
17
18
NC
D0
J0
D1
J1
D2
J2
5
6
7
8
9
10
11
25
24
23
22
21
20
19
L5
L6
L7
MR
AE
A2
NC
28 PIN PLCC
MITEL [ MITEL NETWORKS CORPORATION ]
