MT8889C/MT8889C-1
5.0 VDC
MMD6150 (or
equivalent)
2.4 kΩ
5.0 VDC
TEST POINT
3 kΩ
TEST POINT
130 pF
24 kΩ
MMD7000 (or
equivalent)
100 pF
Test load for D0-D3 pins
Test load for IRQ/CP pin
Figure 14 - Test Circuits
INITIALIZATION PROCEDURE
A software reset must be included at the beginning of all programs to initialize the control registers after
power up. The initialization procedure should be implemented 100ms after power up.
Intel
Data
Description:
Motorola
WR RD
b3
b2
b1
b0
RS0
R/W
1) Read Status Register
1
1
1
0
X
X
X
X
2) Write to Control Register
1
0
0
1
0
0
0
0
3) Write to Control Register
1
0
0
1
0
0
0
0
4) Write to Control Register
1
0
0
1
1
0
0
0
5) Write to Control Register
1
0
0
1
0
0
0
0
6) Read Status Register
1
1
1
0
X
X
X
X
TYPICAL CONTROL SEQUENCE FOR BURST MODE APPLICATIONS
Transmit DTMF tones of 50 ms burst/50 ms pause and Receive DTMF Tones.
Sequence:
1)
2)
3)
4)
5)
RS0
Write to Control Register A
1
(tone out, DTMF, IRQ, Select Control Register B)
Write to Control Register B
1
(burst mode)
Write to Transmit Data Register
0
(send a digit 7)
Wait for an Interrupt or Poll Status Register
Read the Status Register
1
R/W
0
0
0
WR RD
0
1
0
0
1
1
b3
1
0
0
b2
1
0
1
b1
0
0
1
b0
1
0
1
1
1
0
X
X
X
X
-if bit 1 is set, the Tx is ready for the next tone, in which case ...
Write to Transmit Register
0
0
0
(send a digit 5)
-if bit 2 is set, a DTMF tone has been received, in which case ....
Read the Receive Data Register
0
1
1
-if both bits are set ...
Read the Receive Data Register
Write to Transmit Data Register
1
0
1
0
1
0
X
X
X
X
0
0
1
0
1
0
0
1
X
0
X
1
X
0
X
1
NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms ( ±2 ms) AFTER THE DATA IS
WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms (± 4 ms)
Figure 15 - Application Notes
4-118
MITEL [ MITEL NETWORKS CORPORATION ]
