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MT8930C 参数 Datasheet PDF下载

MT8930C图片预览
型号: MT8930C
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUS⑩家庭用户网络接口电路的初步信息 [CMOS ST-BUS⑩ FAMILY Subscriber Network Interface Circuit Preliminary Information]
分类和应用: 网络接口
文件页数/大小: 36 页 / 685 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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®
CMOS ST-BUS™ FAMILY
MT8930C
Subscriber Network Interface Circuit
Preliminary Information
Features
ETS 300-012, CCITT I.430 and ANSI T1.605
S/T interface
Full-duplex 2B+D, 192 kbit/s transmission
Link activation/deactivation
D-channel access contention resolution
Point-to-point, point-to-multipoint and star
configurations
Master (NT)/Slave (TE) modes of operation
Exceeds loop length requirements
Complete loopback testing capabilities
On chip HDLC D-channel protocoller
8 bit Motorola/Intel microprocessor interface
Controllerless or microprocessor-controlled
operation
Mitel ST-BUS interface
Low power CMOS technology
Single 5 volt power supply
ISSUE 1
May 1995
Ordering Information
MT8930CC
28 Pin Ceramic DIP
MT8930CE
28 Pin Plastic DIP
MT8930CP
44 Pin PLCC
-40°C to +85°C
Description
The MT8930C Subscriber Network Interface Circuit
(SNIC) implements the ETSI ETS 300-012, CCITT
I.430 and ANSI T1.605 Recommendations for the
ISDN S and T reference points. Providing point-to-
point and point-to-multipoint digital transmission, the
SNIC may be used at either end of the subscriber
line (NT or TE).
An HDLC D-channel protocoller is included and
controlled through a Motorola/Intel microprocessor
port. A controllerless mode allows the SNIC to
operate without a microprocessor.
The MT8930C is fabricated in Mitel’s CMOS
process.
Applications
ISDN NT1
ISDN S or T interface
ISDN Terminal Adaptor (TA)
Digital sets (TE1) - 4 wire ISDN interface
Digital PABXs, Digital Line Cards (NT2)
DSTi
DSTo
ST-BUS
Interface
D-channel Priority
Mechanism
LTx
S-Bus
Link
Interface
VBias
LRx
F0od
C4b
F0b
STAR/Rsto
CK/NT
Cmode
Microprocessor Interface
V
SS
Timing
and
Control
PLL
HDLC
Transceiver
Link
Activation
Controller
V
DD
Rsti
HALF
AD0-7
R/W/WR,
AFT/PRI
DS/RD,
DinB
AS/ALE,
P/SC
CS,
DReq
IRQ/NDA,
DCack
Figure 1 - Functional Block Diagram
9-35