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MT8985AL 参数 Datasheet PDF下载

MT8985AL图片预览
型号: MT8985AL
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUS⑩系列增强型数字式开关 [CMOS ST-BUS⑩ FAMILY Enhanced Digital Switch]
分类和应用: 开关
文件页数/大小: 18 页 / 326 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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®
CMOS ST-BUS™ FAMILY
MT8985
Enhanced Digital Switch
Features
256 x 256 channel non-blocking switch
Programmable frame integrity for wideband
channels
Automatic identification of ST-BUS/GCI
interface backplanes
Per channel tristate control
Patented message mode
Non-multiplexed microprocessor interface
Single +5 volt supply
Available in DIP-40, PLCC-44 and QFP-44
packages
Pin compatible with MT8980 device
ISSUE 5
March 1997
Ordering Information
MT8985AE
40 Pin Plastic DIP
MT8985AP
44 Pin PLCC
MT8985AL
44 Pin QFP
-40°C to +85°C
Description
The MT8985 Enhanced Digital Switch device is an
upgraded version of the popular MT8980D Digital
Switch (DX). It is pin compatible with the MT8980D
and retains all of the MT8980D's functionality. This
VLSI device is designed for switching PCM-encoded
voice or data, under microprocessor control, in digital
exchanges,
PBXs
and
any
ST-BUS/MVIP
environment. It provides simultaneous connections
for up to 256 64kb/s channels. Each of the eight
serial inputs and outputs consist of 32 64 kbit/s
channels multiplexed to form a 2048 kbit/s stream.
As the main function in switching applications, the
device provides per-channel selection between
variable or constant throughput delays. The constant
throughput delay feature allows grouped channels
such as ISDN H0 to be switched through the device
maintaining its sequence integrity. The MT8985 is
ideal for medium sized mixed voice/data switch and
voice processing applications.
Applications
Medium size digital switch matrices
Hyperchannel switching (e.g., ISDN H0)
ST-BUS/MVIP
interface functions
Serial bus control and monitoring
Centralized voice processing systems
Data multiplexer
C4i
F0i
V
DD
V
SS
ODE
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
Serial
to
Parallel
Converter
Data
Memory
Frame
Counter
Output
MUX
Parallel
to
Serial
Converter
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
Control Register
Connection
Memory
Control Interface
DS CS R/W A5/
A0
DTA D7/
D0
CSTo
Figure 1 - Functional Block Diagram
2-45