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MT89L86AN 参数 Datasheet PDF下载

MT89L86AN图片预览
型号: MT89L86AN
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS ST- BUS⑩系列多速率数字开关 [CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch]
分类和应用: 开关光电二极管
文件页数/大小: 40 页 / 175 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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CMOS ST-BUS™ FAMILY
MT89L86
Multiple Rate Digital Switch
Advance Information
Features
3.3 volt supply
5V tolerant inputs and TTL compatible outputs.
256 x 256 or 512 x 256 switching configurations
8-bit or 4-bit channel switching capability
Guarantees frame integrity for wideband
channels
Automatic identification of ST-BUS/GCI
interfaces
Accepts serial streams with data rates of 2.048,
4.096 or 8.192 Mb/s
Rate conversion from 2.048 Mb/s to 4.096 or
8.192 Mb/s and vice-versa
Programmable frame offset on inputs
Per-channel three-state control
Per-channel message mode
Control interface compatible to Intel/Motorola
CPUs
Low power consumption
DS5195
ISSUE 2
September 1999
Ordering Information
MT89L86AP
MT89L86AN
44 Pin PLCC
48 Pin SSOP
-40°C to +85°C
Description
The 3.3V Multiple Rate Digital Switch (MT89L86) is
pin compatible with MITEL’s 5V MT8986 and retains
all of its functionality. This 3.3v device is designed to
provide simultaneous non-blocking connections for
up to 256 64kb/s channels or blocking connections
for up to 512 64kb/s channels. The serial inputs and
outputs may have 32 to 128 64kb/s channels per
frame with data rates ranging from 2048 up to 8192
kb/s. It also provides per-channel selection between
variable and constant throughput delays allowing
voice and grouped data channels to be switched
without corrupting the data sequence integrity.
Applications
Medium size mixed voice and data switching/
processing matrices
Hyperchannel switching (e.g., ISDN H0)
MVIP
interface functions
Serial bus control and monitoring
Centralized voice processing systems
Voice/Data multiplexer
ADPCM 32 kbit/s channel switching
** V
DD
RESET
V
SS
ODE
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
STi8
STi9
STi10
STi11
STi12
STi13
STi14
STi15
Serial
to
Parallel
Converter
Timing
Unit
Multiple Buffer Data
Memory
Output
MUX
Parallel
to
Serial
Converter
Connection
Memory
Internal Registers
Microprocessor
Interface
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
STo8
STo9
** for 48-pin SSOP only
CLK FR AS/ IM
ALE
DS CS
RD
R/W A0/ DTA AD7/
AD0
WR A7
CSTo
Figure 1 - Functional Block Diagram
1