MT90812
14.1.7 Receive Packet Termination........................................................................................................... 42
15.0 C-Channel Data.............................................................................................................. 42
16.0 Tone Generation ............................................................................................................ 42
16.1 Tone Ringer............................................................................................................................................44
17.0 Frequency Shift Keying (FSK) Transmitter.................................................................. 45
18.0 Ringing Generator ......................................................................................................... 47
19.0 Supervisory Signal Detection and Cadence Measurement ....................................... 47
20.0 Microprocessor Port...................................................................................................... 49
21.0 Connection Memory Bits .............................................................................................. 50
21.1 Connection Memory High.......................................................................................................................50
21.2 Connection Memory Low........................................................................................................................51
22.0 Detailed Register Descriptions .................................................................................... 52
22.1 Address Memory Select Register (AMS)................................................................................................53
22.2 Control Register (CTL) ...........................................................................................................................54
22.3 Timing Control Register (TC) .................................................................................................................55
22.4 Output Clocking Control Register (OCC) ...............................................................................................56
22.5 Interrupt Status Register (INTS).............................................................................................................56
22.6 Interrupt Enable Register (INTE)............................................................................................................57
22.7 Ringer and FSK Control Register (RFC) ................................................................................................58
22.8 FSK Transmit Memory (FSKM) ..............................................................................................................59
22.9 Conference Overflow Status Register (CONFO)....................................................................................59
22.10 Conference Control Register (CC) .........................................................................................................60
22.11 Tone Generation and Energy Detect Control Register (TEDC) .............................................................61
22.12 Energy Detect A - Low Threshold (EDALT) ..........................................................................................62
22.13 Energy Detect A - High Threshold (EDAHT) .........................................................................................62
22.14 Supervisory Signal Cadence Register A (SSCA) ...................................................................................62
22.15 Energy Detect B - Low Threshold Register (EDBLT) .............................................................................63
22.16 Energy Detect B - High Threshold Register (EDBHT)...........................................................................63
22.17 Supervisory Signal Cadence Register B (SSCB) ..................................................................................63
22.18 Low Tone Coefficient Registers 1-7 (LTC1-7).......................................................................................64
22.19 High Tone Coefficient Registers 1-7 (HTC1-7) ......................................................................................64
22.20 Conference Party Control Register (CPC1-15) .....................................................................................65
22.21 D-Channel Receive Interrupt Threshold (DRXIT)...................................................................................66
22.21.1 Message Length Interrupt Mode.................................................................................................... 66
22.21.2 FIFO Level Interrupt Mode ............................................................................................................ 66
22.22 D-Channel RX Control (DRXC) ..............................................................................................................67
22.23 D-Channel BR Status (DRXS)................................................................................................................68
ix
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