MT90823
3V Large Digital Switch
Features
•
•
•
•
•
•
•
•
•
•
•
•
2,048
×
2,048 channel non-blocking switching
at 8.192 Mb/s
Per-channel variable or constant throughput
delay
Automatic identification of ST-BUS/GCI
interfaces
Accept ST-BUS streams of 2.048, 4.096 or
8.192 Mb/s
Automatic frame offset delay measurement
Per-stream frame delay offset programming
Per-channel high impedance output control
Per-channel message mode
Control interface compatible to Motorola
non-multiplexed CPUs
Connection memory block programming
3.3V local I/O with 5V tolerant inputs and
TTL-compatible outputs
IEEE-1149.1 (JTAG) Test Port
DS5064
ISSUE 3
January 2000
Ordering Information
MT90823AP
84 Pin PLCC
MT90823AL
100 Pin MQFP
MT90823AB
100 Pin LQFP
MT90823AG
120 Pin PBGA
-40 to +85°C
Description
The MT90823 Large Digital Switch has a
non-blocking switch capacity of: 2,048 x 2,048
channels at a serial bit rate of 8.192 Mb/s; 1,024 x
1,024 channels at 4.096 Mb/s; and 512 x 512
channels at 2.048 Mb/s. The device has many
features that are programmable on a per stream or
per channel basis, including message mode, input
offset delay and high impedance output control.
Per stream input delay control is particularly useful
for managing large multi-chip switches that transport
both voice channel and concatenated data channels.
In addition, the input stream can be individually
calibrated for input frame offset using a dedicated
pin.
Applications
•
•
•
•
•
•
Medium and large switching platforms
CTI application
Voice/data multiplexer
Digital cross connects
ST-BUS/GCI interface functions
Support IEEE 802.9a standard
V
DD
V
SS
TMS
TDI
TDO
TCK
TRST
IC
RESET
ODE
Test Port
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
STi8
STi9
STi10
STi11
STi12
STi13
STi14
STi15
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
STo8
STo9
STo10
STo11
STo12
STo13
STo14
STo15
Serial
to
Parallel
Converter
Loopback
Parallel
Multiple Buffer
Data Memory
Output
MUX
to
Serial
Converter
Internal
Registers
Connection
Memory
Timing
Unit
Microprocessor Interface
CLK
F0i
FE/ WFPS
HCLK
AS/ IM DS/ CS R/W
ALE
RD
/WR
A7-A0 DTA D15-D8/ CSTo
AD7-AD0
Figure 1 - Functional Block Diagram
1
MITEL [ MITEL NETWORKS CORPORATION ]
