PDSP1601/PDSP1601A
PIN DESCRIPTIONS
Symbol
MSB
MSS
B15 - B0
CEB
CLK
Pin No.
(LC84
Package)
2
3
4 - 19
20
21
Description
ALU B-input multiplexer select control.
1
This input is latched internally on the rising edge
of CLK.
Shifter Input multiplexer select control.
1
This input is latched internally on the rising edge
of CLK.
B Port data input.
Data presented to this port is latched into the input register on the rising
edge of CLK. B15 is the MSB.
Clock enable, B Port input register.
When low the clock to this register is enabled.
Common clock to all internal registered elements.
change on the rising edge of CLK.
All registers are loaded, and outputs
MSA0 - MSA1 23 - 24
A15 - A0
CEA
MSC
IS0 - IS3
SV0 - SV3
25 - 40
41
42
43 - 46
47 - 50
ALU A-input multiplexer select control.
1
These inputs are latched internally on the rising
edge of CLK.
A Port data input.
Data presented to this port is latched into the input register on the rising
edge of CLK. A15 is the MSB.
Clock enable, A Port input register.
When low the clock to this register is enabled.
C-Port multiplexer select control.
1
This input is latched internally on the rising edge
of CLK.
Instruction inputs to Barrel Shifter, IS3 = MSB.
1
These inputs are latched internally on the
rising edge of CLK.
Shift Value I/O Port.
This port is used as an input when shift values are supplied from
external sources, and as an output when Normalise operations are invoked. The I/O functions
are determined by the IS0 - IS3 instruction inputs, and by the
SVOE
control.
The shift value is latched internally on the rising edge of CLK.
SV Output enable.
When high the SV port can only operate as an input. When low the SV
port can act as an input or as an output, according to the IS0 - IS3 instruction. This pin should
be tied hihg or low, depending upon the application.
Instruction inputs to Barrel Shifter registers.
1
These inputs are latched internally on the
rising edge of CLK.
C Port data output.
Data output on this port is selected by the C output multiplexer.
C15 is the MSB.
Output enable.
The C Port outputs are in high impedance condition when this control is high.
Block Floating Point Flag
from ALU, active high.
Carry out
from MSB of ALU.
Instruction inputs to ALU registers.
1
These inputs are latched internally on the rising
edge of CLK.
Carry in
to LSB of ALU.
Instruction inputs to ALU.
1
IA4 = MSB. These inputs are latched internally on the rising
edge of CLK.
+5V supply:
Both Vcc pins must be connected.
0V supply:
Both GND pins must be connected.
SVOE
51
RS0, RS1
RS2
C0 - C15
OE
BFP
CO
RA0 - RA2
CI
IA0 - IA3
IA4
Vcc
GND
NOTES
1.
52 - 53
55
56 - 63
65 - 72
73
74
76
77 - 79
80
81 - 84
1
54 & 75
22 & 64
All instructions are executed in the cycle commencing with the rising edge of the CLK which latches the inputs.
3
MITEL [ MITEL NETWORKS CORPORATION ]
