PDSP16318/13618A
PDSP16318/PDSP16318A
Complex Accumulator
Advance Information
Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1
DS3708 - 2.4 September 1996
The PDSP16318 contains two independent 20-bit Adder/
Subtractors combined with accumulator registers and shift
structures. The four port architecture permits full 20MHz
throughout in FFT and filter applications.
Two PDSP16318As combined with a single PDSP16112A
Complex Multiplier provide a complete arithmetic solution for
a Radix 2 DIT FFT Butterfly. A new complex Butterfly result
can be generated every 50ns allowing 1K complex FFTs to be
executed in 256µs.
PIN 1A INDEX MARK
ON TOP SURFACE
A
B
C
D
E
F
G
H
J
K
L
11 10 9
8 7
6
5 4
3
2
1
FEATURES
s
s
s
s
s
s
s
s
s
s
Full 20MHz Throughout in FFT Applications
Four Independent 16-bit I/O Ports
20-bit Addition or Accumulation
Fully Compatible with PDSP16112 Complex Multiplier
On Chip Shift Structures for Result Scaling
Overflow Detection
Independent Three-State Outputs and Clock
Enables for 2 Port 20MHz Operation
1.4 micron CMOS
500mW Maximum Power Dissipation
84 Pin PGA or QFP packages
AC84
Fig.1 Pin connections - bottom view (AC84 - PGA)
APPLICATIONS
s
s
s
s
High speed Complex FFT or DFTs
Complex Finite Impulse Response (FIR) Filtering
Complex Conjugation
Complex Correlation/Convolution
16 x 12 Complex Multiplier
16 x 16 Complex Multiplier
ALU and Barrel Shifter
Pythagoras Processor
ASSOCIATED PRODUCTS
PDSP16112
PDSP16116
PDSP1601
PDSP16330
Fig. 2 PDSP16318 simplified block diagram
1
MITEL [ MITEL NETWORKS CORPORATION ]
