SA828
TRIANGLE WAVE AT
CARRIER FREQUENCY,
SAMPLING ON
+VE
AND
–
VE PEAKS
PWM SWITCHING
INSTANTS
+1
0
POWER WAVEFORM
AS READ FROM
INTERNAL ROM
–
1
+1
RESULTING
PWM
WAVEFORM
0
–
1
Fig. 3 Asynchronous PWM generation with‘double-edged’ regular sampling as used by the SA828
t
1
ALE
AS
t
1
t
2
RD
t
4
t
3
t
5
t
7
t
2
WR
t
3
t
4
DS
t
6
t
8
t
9
R/W
CS
t
8
t
10
t
11
CS
t
9
AD
0
-AD
7
t
10
t
11
t
15
LATCH ADDRESS
t
12
LATCH DATA
AD
0
-AD
7
t
15
LATCH ADDRESS
t
12
LATCH DATA
Fig. 4 Intel bus timing definitions
Parameter
ALE high period
Delay time, ALE to
WR
WR
low period
Delay time,
WR
high to ALE high
CS
setup time
CS
hold time
Address setup time
Address hold time
Data setup time
Data hold time
Symbol
t
1
t
2
t
3
t
4
t
8
t
9
t
10
t
15
t
11
t
12
Min.
70
40
200
40
20
0
30
30
100
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig. 5 Motorola bus timing definitions
Parameter
AS high period
Delay time, as low to DS high
DS high period
Delay time, DS low to AS high
DS low period
DS high to R/W low setup time
R/W hold time
CS
setup time
CS
hold time
Address setup time
Address hold time
Write data setup time
Write data hold time
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
15
t
11
t
12
Min.
90
40
210
40
200
10
10
20
0
30
30
110
30
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 1 Intel bus timings at V
DD
= 5V, T
AMB
=
+
25°C
Table 2 Motorola bus timings at V
DD
= 5V, T
AMB
= +25
°
C
4
MITEL [ MITEL NETWORKS CORPORATION ]
