SP5512
MSB
Address
Programmable divider
Programmable divider
Charge pump and test bits
I/O port control bits
1
0
2
7
1
P7
1
2
14
2
6
CP
P6
0
2
13
2
5
T1
P5
0
2
12
2
4
T0
P4
0
2
11
2
3
1
P3
MA1 MA0
2
10
2
2
1
P2
2
9
2
1
1
X
LSB
0
2
8
2
0
OS
X
A
A
A
A
A
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Table 1 Write data format (MSB transmitted first)
Address
Status byte
1
1
0
I2
0
I1
0
I0
MA1 MA0
A2
A1
1
A0
A
A
Byte 1
Byte 2
POR FL
Table 2 Read data format
A2
1
0
0
0
0
A1
0
1
1
0
0
A0
0
1
0
1
0
Voltage input to P6
0·6V
CC
to 13·2V
0·45V
CC
to 0·6V
CC
0·3V
CC
to 0·45V
CC
0·15V
CC
to 0·3V
CC
0V to 0·15V
CC
MA1 MA0 Voltage input to P3
0
0
1
1
0
1
0
1
0V to 0·2V
CC
Always valid
0·3V
CC
to 0·7V
CC
0·8V
CC
to 13·2V
Table 3 ADC levels
A
MA1, MA0
CP
T1
T0
OS
P7, P6, P5, P4,
P3, P2
POR
FL
I2, I1, I0
A2, A1, A0
X
:
:
:
:
:
:
:
:
:
:
:
:
Table 4 Address selection
Acknowledge bit
Variable address bits (see Table 4)
Charge Pump current select
Test mode selection
Charge pump disable
Varactor drive Output disable Switch
Control output port states
Power On Reset indicator
Phase lock detect flag
Digital information from ports P7, P5 and P4 respectively
5-level ADC data from P6 (see Table 3)
Don't care
Fig. 3 Data formats
5