SP8401
Very Low Phase Noise 300MHz
÷
10/11
Supersedes February 1992 edition
DS3230 - 3.1 April 1994
The SP8401 is a very low phase noise variable modulus
divider. Special circuit techniques have been used to reduce
the phase noise considerably below that produced by standard
dividers. The modulus control input is CMOS or TTL
compatible.
The SP8401 is packaged in a 28 pin plastic SO package to
be compatible with the SP8400 and SP8402 devices.
N/C
N/C
N/C
V
CC
+5V
GND
CLOCK INPUT
CLOCK INPUT
CLOCK INPUT
CLOCK INPUT
GND
V
CC
+5V
V
CC
+5V
N/C
MODULUS CONTROL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
N/C
N/C
N/C
N/C
N/C
N/C
N/C
OUTPUT
OUTPUT
N/C
V
CC
+5V
N/C
N/C
N/C
FEATURES
s
Very low Phase Noise (Typically -160dBc/Hz at 1kHz
offset)
s
Supply Voltage 5V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Output Current
Storage Temperature Range
Maximum Clock Input Voltage
6.5V
20mA
-55°C to +125°C
2.5V p-p
MP28
ORDERING INFORMATION
SP8401 KG MPES(Commercial Grade)
Fig.1 Pin connections - top view
0
–10
–20
–30
–40
–50
(f) (dBc/Hz) –3dB
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
1
10
100
Frequency (Hz)
1k
10k
100k
Fig.2 Typical single sideband phase noise measured at 300MHz
MITEL [ MITEL NETWORKS CORPORATION ]
