MITSUBISHI <CONTROL / DRIVER IC>
M54972P/FP
Bi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER
DESCRIPTION
The M54972 is a semiconductor integrated circuit consisting of 8
stages of CMOS shift registers and latches with serial inputs and
serial or parallel outputs. It is based on Bi-CMOS process
technology, and has 8 bipolar drivers at the parallel outputs.
PIN CONFIGURATION (TOP VIEW)
Clock
Serial input
T
→
1
S-IN
→
2
3
4
16
→
O1
15
→
O2
14
→
O3
13
→
O4
12
→
O5
11
→
O6
10
→
O7
9
→
O8
Parallel outputs
Logic GND L-GND
M54972P/FP
FEATURES
q
Serial input and serial or parallel output
q
Serial output enables cascade connection
q
Built-in latch for each stage
q
Enable input provides output control
q
Low supply current (standby current I
CC
≤
10µA)
q
Serial I/O level is compatible with typical CMOS devices
q
Driver features: High withstand voltage (BV
CEO
≥
30V)
Capable of large drive currents (I
O(max)
=300mA)
Low output saturation voltage V
OL
< 0.6V at l
o
=300mA
q
Wide operating temperature range T
a
=-20 – +75°C
Power supply
V
CC
Serial output S-OUT
←
5
Latch input LATCH
→
6
Enable input
EN
→
7
8
Driver GND P-GND
Outline 16P4(P)
16P2N-A(FP)
APPLICATION
Dot drivers for thermal print heads. Serial/parallel conversion.
Drivers for relays and solenoids.
For parallel output. When the clock pulse changes from low to
high, latch input (LATCH) is high and output enable input (EN) is
low the serial input data at S-IN appears at output O1 and the other
data already present is shifted sequentially to outputs O2 through
O8.
The parallel outputs are inverted.
When the latch input is held low, the latch retains the stored data.
When the EN input is high, outputs O1 through O8 all turn off. As
the internal logic is unstable when the power is turned on, the EN
input should be kept high (setting outputs O1 through O8 off) until
input data is set and the internal logic is initialized.
L-GND is the GND of CMOS logic circuit and P-GND is the GND of
output driver circuits O1 through O8 which employ bipolar
transistors capable of large drive currents.
Parallel outputs
FUNCTION
The M54972 consists of 8 stages of D-type flip flops connected to
8 latches.
Data is input to serial input S-IN, and clock pulses are input to
clock input T. When the clock changes from low to high, the input
data enters the first shift register and data already in the shift
registers is shifted sequentially.
The serial output S-OUT is used to connect multiple M54972 to
expand the number of parallel outputs. S-OUT is connected to S-IN
of the next stage.
BLOCK DIAGRAM
O1
16
O2
15
O3
14
O4
13
O5
12
O6
11
O7
10
O8
9
Power supply
V
CC
4
8 P-GND Driver GND
Enable input
EN 7
Q
L
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
Latch input LATCH 6
Serial input
S-IN 2
D
T
Q
D
T
Q
D
T
Q
D
T
Q
D
T
Q
D
T
Q
D
T
Q
D
T
Q
5 S-OUT Serial output
Clock
T 1
3
L-GND
Logic GND
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