1997-3/25
MITSUBISHI LSIs
M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L,
-55LL,-70LL,-10LL
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
DESCRIPTION
The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS
static RAM organized as 131072 word by 8-bit which are
fabricated using high-performance triple polysilicon CMOS
technology. The use of resistive load NMOS cells and CMOS
periphery result in a high density and low power static RAM.
They are low standby current and low operation current and ideal
for the battery back-up application.
The M5M51008BVP,RV,KV,KR are packaged in a 32-pin thin
small outline package which is a high reliability and high density
surface mount device(SMD).Two types of devices are available.
VP,KV(normal lead bend type package),RV,KR(reverse lead bend
type package). Using both types of devices, it becomes very easy
to design a printed circuit board.
PIN CONFIGURATION (TOP VIEW)
NC
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
1
2
3
4
5
32
31
30
29
28
6
7
8
9
27
26
25
24
23
22
21
20
19
18
17
ADDRESS
INPUTS
FEATURES
Power supply current
Type name
M5M51008BP,FP,VP,RV,KV,KR-55L
M5M51008BP,FP,VP,RV,KV,KR-70L
M5M51008BP,FP,VP,RV,KV,KR-10L
M5M51008BP,FP,VP,RV,KV,KR-55LL
M5M51008BP,FP,VP,RV,KV,KR-70LL
M5M51008BP,FP,VP,RV,KV,KR-10LL
Access time
(max)
Active
(1MHz)
(max)
stand-by
(max)
DATA
INPUTS/
OUTPUTS
55ns
70ns
100ns
55ns
70ns
100ns
A
2 10
A
1 11
A
0 12
DQ
1 13
DQ
2 14
DQ
3 15
GND
16
V
CC
ADDRESS
A
15
INPUT
S
2 CHIP SELECT
INPUT
W
WRITE CONTROL
INPUT
A
13
A
8
ADDRESS
INPUTS
A
9
A
11
OE
OUTPUT ENABLE
INPUT
A
10
ADDRESS
INPUT
S
1 CHIP SELECT
INPUT
DQ
8
DQ
7
DQ
6
DATA
INPUTS/
M5M51008BP,FP
DQ
5
OUTPUTS
DQ
4
15mA
100µA
(Vcc=5.5V)
Outline 32P4(P), 32P2M-A(FP)
A
11
A
9
A
8
A
13
W
S
2
A
15
V
CC
NC
A
16
A
14
A
12
A
7
A
6
A
5
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
20µA
15mA
(Vcc=5.5V)
0.3µA
(Vcc=3.0V,typ)
OE
A
10
S
1
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
GND
DQ
3
DQ
2
DQ
1
A
0
A
1
A
2
A
3
Single +5V power supply
Low stand-by current 0.3µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S
1
,S
2
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
M5M51008BP
············
32pin 600mil DIP
M5M51008BFP
············
32pin 525mil SOP
M5M51008BVP,RV
············
32pin 8 X 20 mm
2
TSOP
M5M51008BKV,KR
············
32pin 8 X 13.4 mm
2
TSOP
M5M51008BVP,KV
25
24
23
22
21
20
19
18
17
APPLICATION
Small capacity memory units
A
4
A
5
A
6
A
7
A
12
A
14
A
16
NC
V
CC
A
15
S
2
W
A
13
A
8
A
9
A
11
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Outline 32P3H-E(VP), 32P3K-B(KV)
17
18
19
20
21
22
23
M5M51008BRV,KR
24
25
26
27
28
29
30
31
32
A
3
A
2
A
1
A
0
DQ
1
DQ
2
DQ
3
GND
DQ
4
DQ
5
DQ
6
DQ
7
DQ
8
S
1
A
10
OE
Outline 32P3H-F(RV), 32P3K-C(KR)
NC : NO CONNECTION
1
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ELECTRIC
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