MITSUBISHI<Dig.Ana.INTERFACE>
M62352P,FP,GP
8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
Pin No.
17
14
16
15
18
19
2
3
4
5
6
7
8
9
12
13
11
20
10
1
Symbol
DI
DO
CLK
LD
Ao1
Ao2
Ao3
Ao4
Ao5
Ao6
Ao7
Ao8
Ao9
Ao10
Ao11
Ao12
Vcc
GND
V
DD
Vss
Function
Serial data input terminal
Serial data output terminal
Serial clock input terminal
LD terminal input high level than latch circuit data load
8-bit D-A converter output terminal
Power supply terminal
Digital and analog common GND
D-A converter upper reference voltage input terminal
D-A converter lower reference voltage input terminal
BLOCK DIAGRAM FOR EXPLANATION OF TERMINALS
Vcc
GND
11
DI
20
12-BIT SHIFT REGISTER
17
14
D7
D8
D9
D10
D11
D0
D0
D1
D2
D3
D4
D5
D6
CLK
18
ADDRESS DECODER
8
12
...............
1 2 3 4
12
15
LD
D0
............
8-BIT
LATCH
8-BIT
R-2R D-A
-
D7
..............................................12
..............................................
D0
............
8-BIT
LATCH
8-BIT
R-2R D-A
-
D7
...................................................................................................
10
V
DD
(VrefU)
18
Ao10
13
Ao12
1
V
SS
(VrefL)
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