MITSUBISHI <Dig./Ana. INTERFACE>
M62364FP
8-BIT 8-CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
PIN No. Symbol
Function
8
D I
Serial data input
Serial data output
Do
17
7
Shift clock input. Input data of DI are taken into the 12-bit shift register
on a rising edge of the clock.
CLK
A low state enables data loading to the 12-bit shift register.
During a rising edge of LD, the data will be loaded to the output register.
6
L D
Reset 8-bit latches
19
2
RESET
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VDD
3
10
11
14
15
22
23
5
D/A Converter Output with 8-bit resolution
Power Supply
Ground
20
1
GND
VIN1
4
VIN2
9
VIN3
VIN4
12
13
16
21
24
18
D/A Converter Input
VIN5
VIN6
VIN7
VIN8
VDAref
D-A Converter Reference Voltage Input
( 2 / 6 )
MITSUBISHI ELECTRIC
MITSUBISHI [ Mitsubishi Group ]
