MITSUBISHI
〈DIGITAL
ASSP〉
MITSUBISHI
〈DIGITAL
ASSP〉
M66305AP/AFP
M66305AP/AFP
TOGGLE LINE BUFFER
TOGGLE LINE BUFFER
DESCRIPTION
M66305A Toggle Line Buffer has two 5,120-bit line buffer
memories. It takes in serial data that arrives synchronously
with clock pulses and outputs it in serial at a rate of up to 10
Mbits per second synchronously with external clock pulses.
This buffer employs the double buffer system: While data is
being output, data on the next line can be written on the other
line buffer memory.
FEATURES
• 5,120
×
1bit serial input-serial output line buffer memories
• Data transmission at 10 megabits/second maximum
• Two line buffer memories can be alternated by external
toggle signal.
• Memory capacity can be doubled by cascade connection.
• Because of cascade input pin (CAS1), output potential after
completion of output can be set to either H or L.
• Low noise and high fan-out output (I
O
=
±24mA
guaranteed)
• Every input pin has built-in Schmidt trigger circuit.
• Read counter and write counter can be reset independently.
• RESET, T, CNTRST1 and CNTRST2 are equipped with
negative noise reduction circuit.
APPLICATION
Data buffer between industrial or home-use image data pro-
cessing system and peripheral equipment
PIN CONFIGURATION (TOP VIEW)
INPUT CLOCK
INPUT DATA
INPUT CLOCK ENABLE
CASCADE INPUT 1
TOGGLE SIGNAL INPUT
CHIP SELECT INPUT
RESET INPUT
GND
SICLK
SIDATA
ICE
CAS1
GND
T
CS
RESET
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
SODATA
SOCLK
OCE
CAS2
CNTRST2
CNTRST1
V
CC
BF
INT
OUTPUT DATA
OUTPUT CLOCK
OUTPUT CLOCK ENABLE
CASCADE INPUT 2
READ COUNTER RESET INPUT
WRITE COUNTER RESET INPUT
Outline 20P4
M66305AP
(5V)
BUFFER FULL OUTPUT
WRITE REQUEST OUTPUT
INPUT CLOCK
INPUT DATA
INPUT CLOCK ENABLE
CASCADE INPUT 1
TOGGLE SIGNAL INPUT
CHIP SELECT INPUT
RESET INPUT
GND
SICLK
SIDATA
ICE
CAS1
NC
NC
GND
T
CS
RESET
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
SODATA
SOCLK
OCE
CAS2
NC
NC
CNTRST2
CNTRST1
V
CC
BF
INT
OUTPUT DATA
OUTPUT CLOCK
OUTPUT CLOCK ENABLE
CASCADE INPUT 2
Outline 24P2W-A
NC: No Connection
M66305AFP
READ COUNTER RESET INPUT
WRITE COUNTER RESET INPUT
(5V)
BUFFER FULL OUTPUT
WRITE REQUEST OUTPUT
BLOCK DIAGRAM
CHIP SELECT
INPUT
Matching
detection circuit
CS
INT
OCE
Address selector
RESET INPUT RESET
Read counter
WRITE COUNTER
RESET INPUT CNTRST1
READ COUNTER
CNTRST2
RESET INPUT
INPUT DATA SIDATA
CASCADE INPUT 1 CAS1
INPUT CLOCK SICLK
INPUT CLOCK
ENABLE
TOGGLE SIGNAL
INPUT
ICE
T
Switch
and P.G.
Write register
Write counter
A
D
S-RAM
5120 bits
D
I
D
0
WR
WRITE REQUEST
OUTPUT
OUTPUT CLOCK
ENABLE
SOCLK OUTPUT CLOCK
Data selector
SODATA OUTPUT DATA
Data
buffer
A
D
S-RAM
5120 bits
D
I
D
0
WR
BF
BUFFER FULL
OUTPUT
Toggle F/F
1
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