MITSUBISHI SEMICONDUCTORS POWER MODULES MOS
USING INTELLIGENT POWER MODULES
6.3 Area of Safe Operation for
Intelligent Power Modules
The IPMs built-in gate drive and
protection circuits protect it from
many of the operating modes that
would violate the Safe Operation
Area (SOA) of non-intelligent IGBT
modules. A conventional SOA defi-
nition that characterizes all pos-
sible combinations of voltage, cur-
rent, and time that would cause
power device failure is not re-
quired. In order to define the SOA
for IPMs, the power device capabil-
ity and control circuit operation
must both be considered. The re-
sulting easy to use short circuit and
switching SOA definitions for Intelli-
gent Power Modules are summa-
rized
in this section.
6.3.1 Switching SOA
Switching or turn-off SOA is nor-
mally defined in terms of the maxi-
mum allowable simultaneous volt-
age and current during repetitive
turn-off switching operations. In the
case of the IPM the built-in gate
drive eliminates many of the dan-
gerous combinations of voltage
and current that are caused by im-
proper gate drive. In addition, the
maximum operating current is lim-
ited by the over current protection
circuit. Given these constraints the
switching SOA can be defined us-
ing the waveform shown in Figure
6.12. This waveform shows that the
IPM will operate safely as long as
the DC bus voltage is below the
data sheet V
CC(prot)
specification,
the turn-off transient voltage across
C-E terminals of each IPM switch is
maintained below the V
CES
specifi-
cation, T
j
is less than 125°C, and
the control power supply voltage is
between 13.5V and 16.5V. In this
waveform I
OC
is the maximum cur-
rent that the IPM will allow without
causing an Over Current (OC) fault
to occur. In other words, it is just
below the OC trip level. This wave-
form defines the worst case for
hard turn-off operations because
the IPM will initiate a controlled
slow shutdown for currents higher
than the OC
trip level.
6.3.2 Short Circuit SOA
The waveform in Figure 6.13 de-
picts typical short circuit operation.
The standard test condition uses a
minimum impedance short circuit
which causes the maximum short
circuit current to flow in the device.
In this test, the short circuit current
(I
SC
) is limited only by the device
characteristics. The IPM is guaran-
teed to survive non-repetitive short
circuit and over current conditions
as long as the initial DC bus volt-
age is less than the V
CC(prot)
specification, all transient voltages
across C-E terminals of each IPM
switch are maintained less than the
V
CES
specification, T
j
is less than
125°C, and the control supply volt-
age is between 13.5V and 16.5V.
The waveform shown depicts the
controlled slow shutdown that is
used by the IPM in order to help
minimize transient voltages.
Note:
The condition V
CE
≤
V
CES
has to
be carefully checked for each IPM
switch. For easing the design an-
other rating is given on the data
sheets, V
CC(surge)
, i.e., the maxi-
mum allowable switching surge
voltage applied between the P and
N terminals.
6.3.3 Active Region SOA
Like most IGBTs, the IGBTs used in
the IPM are not suitable for linear
or active region operation. Nor-
mally device capabilities in this
mode of operation are described in
terms of FBSOA (Forward Biased
Safe Operating Area). The IPM’s
internal gate drive forces the IGBT
to operate with a gate voltage of ei-
ther zero for the off state or the
control supply voltage (V
D
) for the
on state. The IPMs under-voltage
lock out prevents any possibility of
active or linear operation by auto-
matically turning the power device
off if V
D
drops to a level
that could cause desaturation of
the IGBT.
Figure 6.13
Figure 6.12
Turn-Off Waveform
Short-Circuit
Operation
I
OC
≤V
CES
≤V
CC(PROT)
≤V
CES
I
SC
≤V
CES
≤V
CC(PROT)
t
off(OC)
Sep.1998
MITSUBISHI [ MITSUBISHI ELECTRIC SEMICONDUCTOR ]
