MITSUMI
System Reset (with built-in watchdog timer) MM1096
Description of Operation
-------------------------------------------------
1. RESET goes low when V
CC
rises to approximately 0.8V.
Approximately 1µA (V
CC
=0.8V) of pull up current is output from RESET
.
.
2. Capacitor C
T
charging starts when V
CC
rises to V
SH
(MM1096A = 3.25V, MM1096B = 4.3V). Output is in
.
.
reset state at this time.
3. Output reset is released (RESET goes high) after a certain time (T
PR
), from when C
T
starts charging until
discharge (the time from when C
T
voltage reaches a certain threshold value 1 (. . 1.4V) until C
T
voltage
=
. 0.2V).
drops to a certain threshold value 2 ( =
.
Reset hold time : T
PR
is as follows.
T
PR
(ms) . . 500 C
T
(µF)
=
C
T
charging starts again after reset release, and watchdog timer operation begins.
Clock input to the CK pin during C
T
charging will cause mis-operation.
4. If a clock is input (negative edge trigger) to the CK pin during C
T
charging, C switches from charging to
discharge.
5. Discharge switches to charging when C
T
voltage drops to a certain threshold value (. . 0.2V). Steps 4 and
=
5 are repeated while a normal clock is input from the logic system.
6. Output goes to reset state (RESET goes low) when the clock ceases and C
T
voltage reaches reset ON
threshold value (. . 1.4V).
=
The formula for C
T
charging time (T
WD
: watchdog timer monitoring time) until reset is output is as follows.
.
T
WD
(ms) = 2500 C
T
(µF)
.
7. Watchdog timer reset time T
WR
is the discharge time until C
T
voltage drops to reset OFF threshold value
(. . 0.2V). The formula is as follows.
=
T
WR
(ms) . . 100 C
T
(µF)
=
After reset OFF threshold value is reached, output reset is released and C
T
starts charging. Thereafter,
steps 4 and 5 are repeated if a normal clock is input, and when the clock ceases, 6 and 7 are repeated.
8. Reset is output when V
CC
drops to V
SL
(MM1096A . . 3.2V, MM1096B . . 4.2V). C
T
is charged
=
=
simultaneously.
9. C
T
charging starts when V
CC
rises to V
SH
.
When V
CC
drops momentarily, C
T
charging begins after the charge is first discharged, if the time from V
CC
dropping below V
SL
until it rises to V
SH
is longer than the Vcc input pulse width standard value T
PI
.
10.Output reset is released after V
CC
goes above V
SH
and after T
PR
, and the watchdog timer starts. Thereafter,
8~10 are repeated when V
CC
goes below V
SL
.
11.When power is OFF, reset is output if V
CC
goes below V
SL
.
12.When V
CC
drops to 0V, reset output is held until V
CC
reaches 0.8V.
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MITSUMI [ MITSUMI ELECTRONICS, CORP. ]
