MOSA ELECTRONICS
TIMING AND DATA FORMAT
MS6311
Stereo Audio DAC
The MS6311 accepts input serial data formats of 16-bit word length. Left and right data words are time
multiplexed. The MSB (bit 1) must always be first. The format of data input is shown in Figs. 2 and 3. With a HIGH
level on the word select input (WS), data is placed in the left input register and with LOW level on the WS input, data is
placed in the right register (Fig. 1). The data in the input registers are simultaneously latched in the output registers
which control the bit switches. Internal bias currents I
BL
and I
BR
are each added to the full scale output current I
FS
in
order to achieve the maximum dynamic range at the outputs of OP1 and OP2(Fig. 1). The reference voltage Vref (Fig. 1)
is approximately 2/3 V
DD
. In this way the maximum dynamic range is achieved over the entire power supply range.
WS
t
r
t
HB
t
f
LEFT
RIGHT
t
LB
t
HW
t
SW
BCK
t
cr
LSB
MSB
t
SD
t
HD
DATA
Fig.2
Timing and input signals.
WS
LEFT
RIGHT
BCK
DATA
2
1
0
15
MSB
14
13
2
1
0
LSB
15
MSB
14
13
2
1
0
LSB
Fig.3
Format of input signals.
MEASUREMENT BLOCK DIAGRAM
R-ch
Pattern
Generator
Generate
sinewave pattern for
BCK.WS.DATA
DAC
L-ch
OPAmp
f = 1 kHz
2Vp-p
sinewave
Analysis
Equipment
AC Level(Vrms)
THD
THD+N
MS6311
NOTE : THD and THD+N is measured by HP AUDIO ANALYZER and FFT Analysis.
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4
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