MS6610
Stereo Audio DAC
MOSA ELECTRONICS
TIMING AND DATA FORMAT
The MS6610 accepts input serial data formats of 16-bit word length. Left and right data words are time
multiplexed. The MSB(bit 1) must always be First. The format of data input is shown in Figs. 2 and 3. With a LOW
level on the word select input(WS) input data is placed in the right input register and with HIGH level on the WS input
data is placed in the left register. The data in the input registers are simultaneously latched in the output registers which
control the bit switches. Internal bias currents IBL and IBR are each added to the full scale output current IFS in order
to achieve the maximum dynamic range at the outputs of OP1 and OP2(Fig. 1). The reference output voltage Vref(Fig.
1) is 2/3 VDD. In this way the maximum dynamic range is achieved over the entire power supply range.
LEFT
WS
RIGHT
tr
tHB
tf
tLB
tHW
tSW
BCK
tcr
tSD
tHD
LSB
MSB
DATA
Fig.2 Timing and input signals.
LEFT
WS
RIGHT
BCK
2
1
0
15 14 13
MSB
2
1
0
15 14 13
MSB
2
1
0
DATA
LSB
LSB
MEASUREMENT BLOCK DIAGRAM
R-ch
L-ch
Pattern
DAC
Analysis
Equipment
OPAmp
Generator
Generate
sinewave pattern for
BCK.WS.DATA
MS6308
f = 1 kHz , 2Vp-p
sinewave
AC Level (Vrms)
THD
MS6610
THD+N
NOTE : THD and THD+N is measured by HP AUDIO ANALYZER and FFT Analysis.
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