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SYS84000RKXL-85 参数 Datasheet PDF下载

SYS84000RKXL-85图片预览
型号: SYS84000RKXL-85
PDF下载: 下载PDF文件 查看货源
内容描述: 4M ×8 SRAM模块 [4M x 8 SRAM MODULE]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 7 页 / 85 K
品牌: MOSAIC [ MOSAIC ]
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4M x 8 SRAM MODULE
SYS84000RKX - 85/10/12
Issue 1.7 : April 2001
Description
The SYS84000RKX is a plastic 32Mbit Static RAM
Module housed in a standard 38 pin Single In-Line
package organised as 4M x 8 with access times of,
85,100, or 120 ns.
The module is constructed using eight 512Kx8 SRAMs
in TSOPII packages mounted onto both sides of an FR4
epoxy substrate. This offers an extremely high PCB
packing density.
The device is offered in standard and low power versions,
with the -L module having a low voltage data retention
mode for battery backed applications. Buffering is
provided on the module to reduce the output capacitance
to 8pF(Typ).
Note: CS and OE on the module, should be used
with care to avoid on and off board bus contention.
Features
Access Times of 85/100/120 ns.
Low Power Disipation:
Operating
770 mW (Max.)
Standby-L Version (CMOS) 4.84mW (Max.)
5 Volt Supply ± 10%.
Completely Static Operation.
Equal Access and Cycle Times.
Low Voltage V
CC
Data Retention.
On-board Decoding & Capacitors.
38 Pin Single-In-Line package (SIP).
Upgrade path to SYS88000RKX (64Mbits).
Block Diagram
Pin Definition
NC
A20
Vcc
WE
D2
D3
D0
A1
A2
A3
A4
GND
D5
A10
A11
A5
A13
A14
A19
CS
A15
A16
A12
A18
A6
D1
GND
A0
A7
A8
A9
D7
D4
D6
A17
Vcc
OE
A21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
OE
WE
A0 - A18
512K x 8
SRAM
CS
CS
CS
CS
T/R
A19
A20
A21
Q0~3
DECODER
Q4~7
D0 - D7
D0 - D7
/8
CS
CS
512K x 8
SRAM
OE
CS
CS
CS
Pin Functions
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
No Connect
Power (+5V)
Ground
A0 - A21
D0 - D7
CS
WE
OE
NC
V
CC
GND
Package Details
Plastic 38 pin Single-In-Line (SIP)