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MS622424 参数 Datasheet PDF下载

MS622424图片预览
型号: MS622424
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8K ×24位CMOS彩色地图 [HIGH PERFORMANCE 8K x 24 BIT CMOS COLOR MAP]
分类和应用:
文件页数/大小: 11 页 / 74 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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MOSEL VITELIC
MS622424
HIGH PERFORMANCE
8K x 24 BIT
CMOS COLOR MAP
MS622424
Features
s
Color Index Mode supports up to 8192 simulta-
neous colors out of 16.7 million total colors
s
24-bit RGB Mode allows full true color display
s
High-speed operation capable of supporting
resolutions up 1280 x 1024
s
Available in 100-pin PQFP and MQUAD
packages
s
Unique “Write-Buffer” at MPU port permits
dualport-like operation using an economical
singleport memory core
s
All TTL compatible inputs and outputs
s
60, 70 and 80 MHz pipelined operation
s
Standard MPU Interface
Description
The MS622424 is a high performance, full
CMOS, 8K x 24, 192K-bit pipelined static memory.
This device is specifically designed for use as a
color look-up table in high resolution video display
systems. When two of these devices are operated
in parallel, the resulting system will be capable of
supporting a display of 1280 x 1024 bit mapped
color graphics with 13 bits per pixel in the Color
Index Mode or 24 bits per pixel in the RGB Mode.
In the Color Index Mode, three internal 8Kx8’s
provide 8192 simultaneous colors from a 16.7
million color palette. The palette can be partitioned
into several smaller palettes thereby supporting
multiple window display. In the RGB Mode, the 24-
bit input can be gamma corrected on one of three
gamma correction tables. The 24-bit gamma
corrected value will then be presented at the output.
This device is implemented in full CMOS for low
power consumption, and is available in an 100-pin
plastic or metal quad-flat-pack.
Functional Block Diagram
PIX.RGB(MUX CONTROL)
PIXIN(0-12)
PIXIN(0-7)
PIXIN(0-12)
PIXIN(8-15)
PIXIN(0-12)
PIXIN(16-23)
ADDR 13
RGB 24
MPU
CONTROL
13
13
13
13
13
13
8
8
8
OUTPUT
LATCH
PIXIN(0-23)
INPUT
LATCH
PIX.RGB(0-1)
CEB1
CEB2
R/WB
CONFIGSEL(0-2)
CONFIGBUS(0-7)
CBLANKB
RSB
BD.REV(0-3)
CLOCK.IN
PIPE.IN(0-3)
2:1 MUX
2:1 MUX
2:1 MUX
3:1 MUX
3:1 MUX
3:1 MUX
8Kx8
8Kx8
8Kx8
POUT(0-23)
64X37
WRITE
FIFO
FIFO ADDR 13
FIFO RGB 24
24
AFB
FFB
PIPELINE SYNCHRONIZATION PATH
PIPE.OUT(0-3)
MS622424 Rev. 1.0 January 1995
8-1