MOSEL VITELIC
V29C51002T/V29C51002B
2 MEGABIT (262,144 x 8 BIT)
5 VOLT CMOS FLASH MEMORY
Description
PRELIMINARY
Features
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256Kx8-bit Organization
Address Access Time: 55, 90 ns
Single 5V
±
10% Power Supply
Sector Erase Mode Operation
16KB Boot Block (lockable)
512 bytes per Sector, 512 Sectors
– Sector-Erase Cycle Time: 10ms (Max)
– Byte-Write Cycle Time: 20
µ
s (Max)
Minimum 10,000 Erase-Program Cycles
Low power dissipation
– Active Read Current: 20mA (Typ)
– Active Program Current: 30mA (Typ)
– Standby Current: 100
µ
A (Max)
Hardware Data Protection
Low V
CC
Program Inhibit Below 3.5V
Self-timed write/erase operations with end-of-cy-
cle detection
– DATA Polling
– Toggle Bit
CMOS and TTL Interface
Available in two versions
– V29C51002T (Top Boot Block)
– V29C51002B (Bottom Boot Block)
Packages:
– 32-pin Plastic DIP
– 32-pin TSOP-I
– 32-pin PLCC
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The V29C51002T/V29C51002B is a high speed
262,144 x 8 bit CMOS flash memory. Writing or
erasing the device is done with a single 5 Volt
power supply. The device has separate chip enable
CE, write enable WE, and output enable OE
controls to eliminate bus contention.
The V29C51002T/V29C51002B offers a combi-
nation of: Boot Block with Sector Erase/Write
Mode. The end of write/erase cycle is detected by
DATA Polling of I/O
7
or by the Toggle Bit I/O
6
.
The V29C51002T/V29C51002B features a
sector erase operation which allows each sector to
be erased and reprogrammed without affecting
data stored in other sectors. The device also
supports full chip erase.
Boot block architecture enables the device to
boot from a protected sector located either at the
top (V29C51002T) or the bottom (V29C51002B).
All inputs and outputs are CMOS and TTL
compatible.
The V29C51002T/V29C51002B is ideal for
applications that require updatable code and data
storage.
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Device Usage Chart
Operating
Temperature
Range
0
°
C to 70
°
C
Package Outline
P
•
T
•
J
•
Access Time (ns)
55
•
90
•
Temperature
Mark
Blank
V29C51002T/V29C51002B Rev. 2.1 October 2000
1
MOSEL [ MOSEL VITELIC, CORP ]
