MOSEL VITELIC
SPD-Table for -10 PC modules: (Continued)
V43658Y04VATG-10PC
Hex Value
Byte
Number
30
31
32
33
34
35
36-61
62
63
64-125
126
127
128+
Function Described
Minimum RAS Pulse Width t
RAS
Module Bank Density (Per Bank)
SDRAM Input Setup Time
SDRAM Input Hold Time
SDRAM Data Input Setup Time
SDRAM Data Input Hold Time
Superset Information (May be used in Future)
SPD Revision
Checksum for Bytes 0 - 62
Manufacturers’s Information (Optional)
Max. Frequency Specification
100 MHz Support Details
Unused Storage Location
SPD Entry Value
45 ns
64 MByte
2.0 ns
1 ns
2.0 ns
1 ns
100 MHz
-10PC
2D
10
20
10
20
10
00
Revision 1.2
12
FC
00
100 MHz
64
CF
00
Absolute Maximum Ratings
Parameter
Voltage on VDD Supply Relative to V
SS
Voltage on Input Relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
Max.
-1 to 4.6
-1 to 4.6
0 to +70
-55 to 125
4
Units
V
V
°
C
°
C
W
DC Characteristics
T
A
= 0
°
C to 70
°
C; V
SS
= 0 V; V
DD
, V
DDQ
= 3.3V
±
0.3V
Limit Values
Symbol
V
IH
V
IL
V
OH
V
OL
I
I(L)
I
O(L)
Parameter
Input High Voltage
Input Low Voltage
Output High Voltage (I
OUT
= –2.0 mA)
Output Low Voltage (I
OUT
= 2.0 mA)
Input Leakage Current, any input
(0 V < V
IN
< 3.6 V, all other inputs = 0V)
Output leakage current
(DQ is disabled, 0V < V
OUT
< V
CC
)
Min.
2.0
–0.5
2.4
—
–10
Max.
V
CC
+0.3
0.8
—
0.4
10
Unit
V
V
V
V
µ
A
µ
A
–10
10
V43658Y04VATG-10PC Rev. 1.0 January 2001
5
MOSEL [ MOSEL VITELIC, CORP ]
