MOSEL VITELIC
V53C518165A
1M x 16 EDO PAGE MODE
CMOS DYNAMIC RAM
OPTIONAL SELF REFRESH
HIGH PERFORMANCE
Max. RAS Access Time, (t
RAC
)
Max. Column Address Access Time, (t
CAA
)
Min. Extended Data Out Page Mode Cycle Time, (t
PC
)
Min. Read/Write Cycle Time, (t
RC
)
50
50 ns
25 ns
20 ns
84 ns
60
60 ns
30 ns
25 ns
104 ns
Features
s
1MB x 16-bit organization
s
EDO Page Mode for a sustained data rate
of 50 MHz
s
RAS access time: 50, 60 ns
s
Dual CAS Inputs
s
Low power dissipation
s
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
• Refresh Interval: 1024 cycles/16 ms
s
Available in 42-pin 400 mil SOJ and
44/50-pin 400 mil TSOP-II Packages
s
Single 5V
±10%
Power Supply
s
TTL Interface
s
Optional Self Refresh (V53C518165AS)
• Refresh Interval: 1024 cycles/128 ms
Description
The V53C518165A is a 1048576 x 16 bit high-
performance CMOS dynamic random access
memory. The V53C518165A offers Page mode op-
eration with Extended Data Output. The
V53C518165A has symmetric address, 10-bit row
and 10-bit column.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as
20ns.
These features make the V53C518165A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0
°
C to 70
°
C
–40
°
C to +85
°
C
Package Outline
K
•
•
Access Time (ns)
50
•
•
Power
Std.
•
•
T
•
•
60
•
•
Temperature
Mark
Blank
I
V53C518165A Rev. 1.1 January 1998
1
MOSEL [ MOSEL VITELIC, CORP ]
