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V53C8126H50 参数 Datasheet PDF下载

V53C8126H50图片预览
型号: V53C8126H50
PDF下载: 下载PDF文件 查看货源
内容描述: 超高性能, 128K ×8位快速页面模式的CMOS动态RAM [ULTRA-HIGH PERFORMANCE, 128K X 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM]
分类和应用:
文件页数/大小: 18 页 / 211 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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MOSEL VITELIC
Notes:
1.
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9.
V53C8126H
I
CC
is dependent on output loading when the device output is selected. Specified I
CC
(max.) is measured with the
output open.
I
CC
is dependent upon the number of address transitions. Specified I
CC
(max.) is measured with a maximum of two
transitions per address cycle in Fast Page Mode.
Specified V
IL
(min.) is steady state operating. During transitions, V
IL
(min.) may undershoot to –1.0 V for a period not
to exceed 20 ns. All AC parameters are measured with V
IL
(min.)
V
SS
and V
IH
(max.)
V
CC
.
t
RCD
(max.) is specified for reference only. Operation within t
RCD
(max.) limits insures that t
RAC
(max.) and t
CAA
(max.)
can be met. If t
RCD
is greater than the specified t
RCD
(max.), the access time is controlled by t
CAA
and t
CAC
.
Either t
RRH
or t
RCH
must be satisified for a Read Cycle to occur.
Measured with a load equivalent to two TTL inputs and 50 pF.
Access time is determined by the longest of t
CAA
, t
CAC
and t
CAP
.
Assumes that t
RAD
t
RAD
(max.). If t
RAD
is greater than t
RAD
(max.), t
RAC
will increase by the amount that t
RAD
exceeds
t
RAD
(max.).
Assumes that t
RCD
t
RCD
(max.). If t
RCD
is greater than t
RCD
(max.), t
RAC
will increase by the amount that t
RCD
exceeds
t
RCD
(max.).
10. Assumes that t
RAD
t
RAD
(max.).
11. Operation within the t
RAD
(max.) limit ensures that t
RAC
(max.) can be met. t
RAD
(max.) is specified as a reference point
only. If t
RAD
is greater than the specified t
RAD
(max.) limit, the access time is controlled by t
CAA
and t
CAC
.
12. t
WCS
, t
RWD
, t
AWD
and t
CWD
are not restrictive operating parameters.
13. t
WCS
(min.) must be satisfied in an Early Write Cycle.
14. t
DS
and t
DH
are referenced to the latter occurrence of
CAS
or
WE.
15. t
T
is measured between V
IH
(min.) and V
IL
(max.). AC-measurements assume t
T
= 5 ns.
16. Assumes a three-state test load (5 pF and a 380 Ohm Thevenin equivalent).
17. An initial 200
µs
pause and 8
RAS-containing
cycles are required when exiting an extended period of bias without
clocks. An extended period of time without clocks is defined as one that exceeds the specified Refresh Interval.
V53C8126H Rev. 1.1 July 1997
8