V62C2804096
512K X 8, CMOS STATIC RAM
PRELIMINARY
s
s
s
s
s
s
s
s
Row Decoder
1024
x
4096
Sense Amp
CILETIV LESOM
Features
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
Description
The V62C2804096 is a very low power CMOS
static RAM organized as 524,288 words by 8 bits.
Easy memory expansion is provided by an active
LOW CE1, and active HIGH CE2, an active LOW
OE, and three static I/O’s. This device has an
a u to m a tic p o w e r -d o w n mo d e f e a tu r e w h e n
deselected.
High-speed: 70, 85 ns
Ultra low standby current of 4µA (max.)
Fully static operation
All inputs and outputs directly compatible
Three state outputs
Ultra low data retention current (V
CC
= 1.2V)
Operating voltage: 2.3V–3.0V
Packages
– 32-Pin TSOP (Standard)
– 36-Ball CSP BGA (8mm x 10mm)
Functional Block Diagram
Input Buffer
I/O
8
I/O1
Column Decoder
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
Control
Circuit
OE
WE
CE1
CE2
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
–40°C to +85°C
Package Outline
T
•
•
B
•
•
Access Time (ns)
70
•
•
85
•
•
L
•
Power
LL
•
•
Temperature
Mark
Blank
I
V62C2804096 Rev. 1.0 November 2001
1