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MC100E457FN 参数 Datasheet PDF下载

MC100E457FN图片预览
型号: MC100E457FN
PDF下载: 下载PDF文件 查看货源
内容描述: 三重差分2 : 1多路复用器 [TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER]
分类和应用: 解复用器逻辑集成电路
文件页数/大小: 5 页 / 114 K
品牌: MOTOROLA [ MOTOROLA, INC ]
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple Differential 2:1
Multiplexer
The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals.
The higher frequency outputs provide the device with a >1.0GHz
bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make the
device well suited for both data path and random logic applications.
The differential inputs have internal clamp structures which will force
the Q output of a gate in an open input condition to go to a LOW state.
Thus, inputs of unused gates can be left open and will not affect the
operation of the rest of the device. Note that the input clamp will take
affect only if both inputs fall 2.5V below VCC.
MC10E457
MC100E457
TRIPLE DIFFERENTIAL
2:1 MULTIPLEXER
Differential D and Q; VBB available
700ps Max. Propagation Delay
High Frequency Outputs
Separate and Common Select
Extended 100E VEE Range of –4.2V to –5.46V
Internal 75kΩ Input Pulldown Resistors
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
Pinout: 28-Lead PLCC
(Top View)
SEL2
D2a
24
D2a
23
VBB
22
D2b
21
D2b COMSEL
20
19
18
17
16
15
14
13
12
5
SEL0
6
D0a
7
D0a
8
VBB
9
D0b
10
11
Q2
Q2
VCC
Q1
Q1
Q0
Q0
PIN NAMES
Pin
Dn[0:2]; Dn[0:2]
SEL
COMSEL
VBB
Q[0:2], Q[0:2]
Function
Differential Data Inputs
Individual Select Input
Common Select Input
VBB Reference Output
Differential Data Outputs
SEL1
D1a
D1a
VEE
VBB
26
27
28
1
2
3
4
25
FUNCTION TABLE
SEL
H
L
Data
a
b
D1b
D1b
D0b VCCO
* All VCC and VCCO pins are tied together on the die.
12/93
©
Motorola, Inc. 1996
2–1
REV 2