MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input OR Gate
The MC10103 is a quad 2–input OR gate. The MC10103 provides one gate
with OR/NOR outputs.
MC10103
PD = 25 mW typ/gate (No Load)
tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
4
5
6
7
12
13
10
11
2
3
15
9
14
VCC1
AOUT
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
BOUT
AIN
AIN
BIN
BIN
VEE
DIP
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC2
COUT
DOUT
CIN
CIN
DIN
DIN
COUT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
©
Motorola, Inc. 1996
3–11
REV 5
MOTOROLA [ MOTOROLA, INC ]
