MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple 2-Input Exclusive OR/
Exclusive NOR Gate
The MC10107 is a triple–2 input exclusive OR/NOR gate.
MC10107
PD = 40 mW typ/gate (No Load)
tpd = 2.8 ns typ
tr, tf = 2.5 ns typ (20%–80%)
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
LOGIC DIAGRAM
4
5
9
7
14
15
3 = (4
•
5) + (4
•
5)
2 = (4
•
5) + (4
•
5)
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
2
3
11
10
12
13
VCC1
AOUT
AOUT
AIN
AIN
*NC
BIN
VEE
1
2
3
4
5
6
7
8
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC2
CIN
CIN
COUT
COUT
BOUT
BOUT
BIN
16
15
14
13
12
11
10
9
*NC = No Connection
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
©
Motorola, Inc. 1996
3–30
REV 5
MOTOROLA [ MOTOROLA, INC ]
