MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 2-Wide 2-3-Input
OR-AND/OR-AND Gate
The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate.
This general purpose logic element is designed for use in data control, such as
digital multiplexing or data distribution. Pin 9 is common to both gates.
MC10117
PD = 100 mW typ/pkg (No Load)
tpd = 2.3 ns typ
tr, tf = 2.2 ns typ (20%–80%)
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
4
5
3
6
7
9
10
11
12
13
14
15
A1IN
A1IN
A2IN
A2IN
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
VEE
4
5
6
7
8
13
12
11
10
9
B1IN
B1IN
B2IN
B2IN
A2IN, B2IN
2
VCC1
AOUT
AOUT
1
2
3
16
15
14
VCC2
BOUT
BOUT
DIP
PIN ASSIGNMENT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
©
Motorola, Inc. 1996
3–68
REV 5
MOTOROLA [ MOTOROLA, INC ]
