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MC10124P 参数 Datasheet PDF下载

MC10124P图片预览
型号: MC10124P
PDF下载: 下载PDF文件 查看货源
内容描述: 四TTL至MECL翻译 [Quad TTL to MECL Translator]
分类和应用: 转换器电平转换器驱动程序和接口锁存器接口集成电路光电二极管
文件页数/大小: 7 页 / 129 K
品牌: MOTOROLA [ MOTOROLA, INC ]
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad TTL to MECL Translator
The MC10124 is a quad translator for interfacing data and control signals
between a saturated logic section and the MECL section of digital systems. The
MC10124 has TTL compatible inputs, and MECL complementary open–emitter
outputs that allow use as an inverting/ non–inverting translator or as a
differential line driver. When the common strobe input is at the low logic level, it
forces all true outputs to a MECL low logic state and all inverting outputs to a
MECL high logic state.
Power supply requirements are ground, +5.0 Volts, and –5.2 Volts.
Propagation delay of the MC10124 is typically 3.5 ns. The dc levels are
standard or Schottky TTL in, MECL 10,000 out.
An advantage of this device is that TTL level information can be transmitted
differentially, via balanced twisted pair lines, to the MECL equipment, where the
signal can be received by the MC10115 or MC10116 differential line receivers.
The MC10124 is useful in computers, instrumentation, peripheral controllers,
test equipment, and digital communications systems.
PD = 380 mW typ/pkg (No Load)
tpd = 3.5 ns typ (+ 1.5 Vdc in to 50% out)
tr, tf = 2.5 ns typ (20%–80%)
MC10124
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
BOUT
AOUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
COUT
DOUT
DOUT
COUT
DIN
CIN
VCC
LOGIC DIAGRAM
BOUT
AOUT
4
2
3
1
AIN
COMMON
STROBE
BIN
VEE
5
6
7
10
12
15
13
14
11
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
Gnd
=
VCC (+5.0Vdc) =
VEE (–5.2Vdc) =
PIN 16
PIN 9
PIN 8
3/93
©
Motorola, Inc. 1996
3–82
REV 5