MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Hex D Master/Slave Flip-Flop
The MC10176 contains six high-speed, master slave type “D” flip-flops.
Clocking is common to all six flip-flops. Data is entered into the master when the
clock is low. Master to slave data transfer takes place on the positive-going
Clock transition. Thus, outputs may change only on a positive-going Clock
transition. A change in the information present at the data (D) input will not affect
the output information any other time due to the master-slave construction of
this device.
PD = 460 mW typ/pkg (No Load)
ftoggle = 150 MHz (typ)
tr, tf = 2.0 ns typ (20%–80%)
MC10176
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
D0
5
2
Q0
D1
6
3
Q1
DIP
PIN ASSIGNMENT
D2
7
4
Q2
VCC1
Q0
Q1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC2
Q5
Q4
Q3
D5
D4
D3
CLOCK
D3
10
13 Q3
Q2
D0
D1
D4
11
14 Q4
D2
VEE
CLOCK
D5
9
12
15 Q5
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
CLOCKED TRUTH TABLE
C
L
H*
H*
D
X
L
H
Qn+1
Qn
L
H
*A clock H is a clock transition
from a low to a high state.
3/93
©
Motorola, Inc. 1996
3–131
REV 5
MOTOROLA [ MOTOROLA, INC ]
