MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Driver
The MC10E/100E112 is a quad driver with two pairs of OR/NOR
outputs from each gate, and a common, buffered enable input. Using the
data inputs the device can serve as an ECL memory address fan-out
driver. Using just the enable input, the device serves as a clock driver,
although the MC10E/100E111 is designed specifically for this purpose,
and offers lower skew than the E112. For memory address driver
applications where scan capabilities are required, please refer to the
E212 device.
MC10E112
MC100E112
QUAD DRIVER
•
•
•
•
600ps Max. Propagation Delay
Common Enable Input
Extended 100E VEE Range of – 4.2V to – 5.46V
75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC
(Top View)
Q3b
25
VCCO
D3
D2
VEE
D1
D0
EN
26
27
28
1
2
3
4
5
NC
6
7
8
Q0b
9
Q0a
10
11
Q3a
24
Q3b
23
Q3a VCCO Q2b
22
21
20
Q2a
19
18
17
16
15
14
13
12
Q2b
Q2a
VCC
Q1b
Q1a
Q1b
Q1a
Q1a
D1
Q1b
Q1a
Q1b
Q2a
D2
Q2b
Q2a
Function
Data Inputs
Enable Input
True Outputs
Inverting Outputs
EN
D3
Q2b
Q3a
Q3b
Q3a
Q3b
D0
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
LOGIC DIAGRAM
Q0a
Q0b
Q0a
Q0b
VCCO Q0a
Q0b VCCO
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
D0 – D3
EN
Qna, Qnb
Qna, Qnb
12/93
©
Motorola, Inc. 1996
2–1
REV 2
MOTOROLA [ MOTOROLA, INC ]
