PIN ASSIGNMENTS
PLASTIC DIP
VDD
fin
OSCin
OSCout
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
VSS
P0
P1
P2
P3
P4
P5
P6
P7
B
2out
FS
LD
P8
φDet
out
SOG PACKAGE
VDD
fin
OSCin
OSCout
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VSS
P0
NC
P1
P2
P3
P4
NC
P5
P6
B
2out
FS
φDet
out
LD
P8
P7
NC = NO CONNECTION
MAXIMUM RATINGS
(Voltages Referenced to VSS)
Parameter
DC Supply Voltage
Input Voltage, All Inputs
DC Input Current, per Pin
Operating Temperature Range
Storage Temperature Range
Symbol
VDD
Vin
I
TA
Tstg
Value
– 0.5 to + 12
– 0.5 to VDD + 0.5
±
10
– 40 to + 85
– 65 to + 150
Unit
V
V
mA
°C
°C
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised that
normal precautions be taken to avoid application
of any voltage higher than maximum rated
voltages to this high impedance circuit. For
proper operation it is recommended that Vin and
Vout be constrained to the range VSS
≤
(Vin or
Vout)
≤
VDD.
MOTOROLA
MC145106
2
MOTOROLA [ MOTOROLA, INC ]
