31
MSB
30
1
0
LSB
BYTE
31
24 23
16 15
16 15
8 7
0
HIGH-ORDER BYTE
MIDDLE HIGH BYTE
MIDDLE LOW BYTE
LOW-ORDER BYTE
16-BIT WORD
31
0
0
HIGH-ORDER WORD
LOW-ORDER WORD
LONG WORD
31
LONG WORD
QUAD-WORD
63
62
32
0
MSB
ANY Dx
5
31
1
ANY Dy
LSB
Figure 5-4 Data Organization in Data Registers
5.2.2 Address Registers
Each address register and stack pointer is 32 bits wide and holds a 32-bit address. Ad-
dress registers cannot be used for byte-sized operands. Therefore, when an address
register is used as a source operand, either the low-order word or the entire long-word
operand is used, depending upon the operation size. When an address register is
used as the destination operand, the entire register is affected, regardless of the op-
eration size. If the source operand is a word size, it is sign-extended to 32 bits. Ad-
dress registers are used primarily for addresses and to support address computation.
The instruction set includes instructions that add to, subtract from, compare, and move
the contents of address registers. Figure 5-5 shows the organization of addresses in
address registers.
31
31
16 15
0
0
SIGN EXTENDED
16-BIT ADDRESS OPERAND
FULL 32-BIT ADDRESS OPERAND
Figure 5-5 Address Organization in Address Registers
MC68331
CENTRAL PROCESSING UNIT
MOTOROLA
5-5
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
