Table D-8 CSPAR0 Pin Assignments
CSPAR0 Field
CSPA0[6]
CSPA0[5]
CSPA0[4]
CSPA0[3]
CSPA0[2]
CSPA0[1]
CSBOOT
CSPAR0 Signal
CS5
Alternate Signal
Discrete Output
FC2
FC1
FC0
BGACK
BG
PC2
PC1
PC0
—
CS4
CS3
CS2
CS1
—
CS0
BR
—
CSBOOT
—
—
Contains seven 2-bit fields, CSPA0[6:1] and CSBOOT, that determine the functions of
corresponding chip-select pins. CSPAR0[15:14] are not used. These bits always read
zero; write has no effect. CSPAR0 bit 1 always reads one; writes to CSPAR0 bit 1 have
no effect. The alternate functions can be enabled by data bus mode selection during
reset.
D.3.24 CSPAR1 — Chip Select Pin Assignment Register 1
$YFFA46
15
0
14
0
13
0
12
0
11
0
10
0
9
8
7
6
5
4
1
3
2
1
1
0
D
CSPA1[4]
CSPA1[3]
CSPA1[2]
CSPA1[1]
CSPA1[0]
RESET:
0
0
0
0
0
0
DATA7
1
DATA6
1
DATA5
DATA4
DATA3
1
Table D-9 CSPAR1 Pin Assignments
CSPAR1 Field
CSPA1[4]
CSPA1[3]
CSPA1[2]
CSPA1[1]
CSPA1[0]
CSPAR1 Signal
Alternate Signal
ADDR23
Discrete Output
CS10
CS9
CS8
CS7
CS6
ECLK
PC6
PC5
PC4
PC3
ADDR22
ADDR21
ADDR20
ADDR19
Contains five 2-bit fields (CSPA1[4:0]) that determine the functions of corresponding
chip-select pins. CSPAR1[15:10] are not used. These bits always read zero; write has
no effect. The CSPAR1 pin assignments table shows alternate functions that can be
enabled by data bus mode selection during reset.
Table D-10 CSPAR0 and CSPAR1 Pin Assignment Field Encoding
Bit Field
Description
00
01
10
11
Discrete Output*
Alternate Function*
Chip Select (8-Bit Port)
Chip Select (16-Bit Port)
*Does not apply to the CSBOOT field
MOTOROLA
D-22
REGISTER SUMMARY
MC68331
USER’S MANUAL