11/2/95
SECTION 1: OVERVIEW
Freescale Semiconductor, Inc.
UM Rev.1.0
TABLE OF CONTENTS (Continued)
Paragraph
Number
5.1.4
5.1.5
5.1.6
5.1.7
5.1.7.1
5.1.7.2
5.1.8
5.1.9
5.2
5.2.1
5.2.2
5.3
5.3.1
5.3.1.1
5.3.1.1.1
5.3.1.1.2
5.3.1.2
5.3.2
5.3.3
5.3.3.1
5.3.3.2
5.3.3.3
5.3.3.4
5.3.3.5
5.3.3.6
5.3.3.7
5.3.3.8
5.3.3.9
5.3.3.10
5.3.4
5.3.4.1
5.3.4.2
5.3.4.3
5.3.4.4
5.3.4.5
5.3.5
5.3.6
5.4
5.4.1
5.4.2
5.4.2.1
5.4.2.2
Title
Page
Number
Vector Base Register....................................................................................5-4
Exception Handling......................................................................................5-4
Addressing Modes........................................................................................5-5
Instruction Set................................................................................................5-5
Table Lookup and Interpolate Instructions...........................................5-7
Low-Power STOP Instruction .................................................................5-7
Processing States.........................................................................................5-7
Privilege States.............................................................................................5-7
Architecture Summary .....................................................................................5-8
Programming Model.....................................................................................5-8
Registers.........................................................................................................5-10
Instruction Set....................................................................................................5-11
M68000 Family Compatibility.....................................................................5-11
New Instructions........................................................................................5-11
Low-Power Stop (LPSTOP)................................................................5-11
Table Lookup and Interpolation (TBL)..............................................5-12
Unimplemented Instructions...................................................................5-12
Instruction Format and Notation.................................................................5-12
Instruction Summary ....................................................................................5-15
Condition Code Register.........................................................................5-20
Data Movement Instructions ...................................................................5-21
Integer Arithmetic Operations.................................................................5-22
Logic Instructions......................................................................................5-24
Shift and Rotate Instructions...................................................................5-24
Bit Manipulation Instructions...................................................................5-25
Binary-Coded Decimal (BCD) Instructions ..........................................5-26
Program Control Instructions..................................................................5-26
System Control Instructions....................................................................5-27
Condition Tests .........................................................................................5-29
Using the TBL Instructions ..........................................................................5-29
Table Example 1: Standard Usage.......................................................5-30
Table Example 2: Compressed Table ..................................................5-31
Table Example 3: 8-Bit Independent Variable ....................................5-32
Table Example 4: Maintaining Precision..............................................5-34
Table Example 5: Surface Interpolations.............................................5-36
Nested Subroutine Calls.............................................................................5-36
Pipeline Synchronization with the NOP Instruction................................5-36
Processing States.............................................................................................5-36
State Transitions...........................................................................................5-37
Privilege Levels.............................................................................................5-37
Supervisor Privilege Level......................................................................5-37
User Privilege Level.................................................................................5-39
Freescale Semiconductor, Inc...
viii
MC68340 USER'S MANUAL
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