MC54/74F148
8-LINE TO 3-LINE
PRIORITY ENCODER
The MC54/74F148 provides three bits of binary coded output representing
the position of the highest order active input, along with an output indicating
the presence of any active input. It is easily expanded via input and output en-
ables to provide priority encoding over many bits.
•
Encodes Eight Data Lines in Priority
•
Provides 3-Bit Binary Priority Code
•
Input Enable Capability
•
Signals When Data Present on Any Input
•
Cascadable for Priority Encoding of n Bits
8-LINE TO 3-LINE
PRIORITY ENCODER
FAST™ SHOTTKY TTL
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
16
EO
15
GS
14
I3
13
I2
12
I1
11
I0
10
A0
9
16
1
J SUFFIX
CERAMIC
CASE 620-09
16
N SUFFIX
PLASTIC
CASE 648-08
1
1
I4
2
I5
3
I6
4
I7
5
E1
6
A2
7
A1
8
GND
LOGIC DIAGRAM
16
(10)
I0
I1
(11)
(15)
(14)
EO
GS
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
Ceramic
Plastic
SOIC
I2
I3
I4
(12)
(9)
(13)
A0
LOGIC SYMBOL
(1)
(7)
I5
(2)
A1
I0 I1 I2 I3 I4 I5 I6 I7 E1
EO
I7
E1
NOTE:
This diagram is provided only for the understanding of logic operations and should not
be used to estimate propagation delays.
10 11 12 13 1
2
3
4 5
I6
(3)
A0
A1
A2
GS
(4)
(5)
(6)
A2
15
9
7
6
14
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
4-59
MOTOROLA [ MOTOROLA, INC ]
